Stmicroelectronics S.r.l.

Salvatore Giuseppe Privitera

Francesco Pulvirenti

Davide Giuseppe Patti

Salvatore Cassata

Marco Martini

Salvatore Pappalardo

Tiziana Teresa Signorelli

Leonardo Sala

Francesco Rua

A field effect transistor has a semiconductor layer with a top surface extending in a horizontal plane, and an active area defined in which are trench gate regions, which extend in depth with respect to the top surface and have an insulating coating layer and a conductive inner layer, and source regions, adjacent to the trench gate regions so as to form a conductive channel extending vertically. The trench gate regions have a plurality of first gate regions, which extend in length in the form of stripes through the active area along a first direction of the horizontal plane, and moreover a plurality of second gate regions, which extend in length in the form of stripes through the same active area along a second direction of the horizontal plane, orthogonal to, and crossing, the first gate regions. In particular, the first gate regions and second gate regions cross in the active area, joining with a non-zero curvature radius.

Trench-gate field effect transistor with improved electrical performances and corresponding manufacturing process

A dead-time circuit includes a signal propagation path from a first input node receiving a PWM modulated control signal to an output node, such signal propagation path switchable between a non-conductive state and a conductive state, such that the signal at the first input node is transferred to the output node when the signal propagation path is in the conductive state. The dead-time circuit further includes a differentiator circuit block coupled to a second input node and to the signal propagation path, the second input node configured to be coupled to an intermediate node of a half-bridge circuit. The differentiator circuit block switches the signal propagation path between the non-conductive state and the conductive state as a function of a time derivative of a signal at the second input node. At least one time-delay circuit component delays transfer of the signal at the first input node to the output node.

Drive circuit for half-bridges, corresponding driver, device and method

A transceiver is connectable to a cable with at least three wires. The transceiver may include a controlled output stage including a high-side leg, having two P-type transistors coupled in series and having a common current terminal, coupled between an output pin and a positive supply pin. The P-type transistors have body regions coupled to the common current terminal of the high-side leg. A low-side leg, includes two N-type transistors coupled in series and having a common current terminal, coupled between the output pin and a negative supply pin. The N-type transistors have body regions coupled to the common current terminal of the low-side leg. The protection circuit also includes a voltage clamper coupled between the common current terminals.

Transceiver suitable for IO-Link devices and related IO-Link device

A method of power point tracking for operating a photovoltaic power plant, which includes a DC-DC converter of the output voltage of a panel having a power switch driven by a PWM control signal of variable duty-cycle generated by a PWM control circuit, in discontinuous conduction mode or continuous conduction mode depending on the current load of the converter, is implemented by low cost analog circuits. The method does not require the use of any analog-to-digital conversion, digital processing or storage resources and may use a single voltage sensor.

Analog MPPT circuit for photovoltaic power plant

A system for driving columns of a liquid crystal display includes logic circuitry operating in a supply path between a first and a second supply voltage in which the first supply voltage is higher than the second supply voltage. The logic circuitry is capable of generating first logic signals and second logic signals whose value is equal to the first or second supply voltage. The system includes two level shifters coupled to the logic circuitry and operating in a supply path between a third supply voltage greater than the first supply voltage and the second supply voltage; the level shifters are capable of raising the value of the second logic signals. The system also includes a first and a second pair of transistors having different supply paths and having an output terminal in common; the first and the second pair of transistors are coupled to the level shifters to determine the drive signal of a column. The system includes turnoff circuitry operating in a supply path between the third and the second supply voltage and coupled to the two level shifters. The turnoff circuitry is capable of keeping one of the two pairs of transistors in a turnoff state in the period of time of a frame when the other of the two pairs of transistors is operative.

System for driving columns of a liquid crystal display

A pull-up circuit for input/output terminals of electronic appliances is disclosed. The circuit is arranged between an input/output terminal and a supply voltage terminal and includes a first transistor and a resistance serially connected and coupled between the input/output terminal and the supply-voltage terminal and circuitry suitable for driving the transistor so as to switch it on or off depending on whether the values achieved by the voltage of the input/output terminal belong or do not belong to a set range of voltage values within the supply-voltage value.

Growing community of inventors

Catania, Italy

Salvatore Giuseppe Privitera