Information Storage Devices, Inc.

Sakhawat M Khan

Trevor A Blyth

Lawrence D Engh

Richard T Simko

David Sowards

Boyce W Jarrett

Bindiganavale S Nataraj

Message management methods and apparatus for the storage and selective playback, erase and other manipulation of messages such as voice messages in a voice message system are disclosed. The devices of the invention include analog signal sample and analog storage capabilities whereby messages may be stored in one or more message segment storage locations. A register stack in each device keeps track of the message number associated with the message segment stored in the respective message segment location so that message segments associated with a particular message may be located in sequence for seamless playback of the entire message. Message segment storage locations available for storing new messages may be identified by a flag identifying the same, such as by an otherwise unused message number stored in the associated stack register. Each device includes the capability of cascading with identical devices so as to extend the total record and playback time available. Other aspects of the invention, including other features and capabilities of the devices and details of the method are disclosed.

Message management methods and apparatus

Method and apparatus for adjustment and control of an iterative method of recording analog signals with on-chip trimming techniques for later playback. The invention allows setting of various parameters for the multi iterative programming technique after chip fabrication so as to allow tighter control and thus higher resolution analog signal sample storage in a given or minimum amount of time. Such parameters include, but are not limited to: the step down voltage from the coarse programming cycle to the fine programming cycle, the incremental voltage increase between each fine pulse, the pulse width of each fine pulse, the number of fine pulses, the incremental voltage increase between each coarse pulse, the pulse width of each course pulse, the number of coarse pulses, and the offset, VOS, which stops further coarse pulses and holds the last coarse level as a reference for the following fine cycle.

Method and apparatus for adjustment and control of an iterative method

Programmable non-volatile analog voltage source devices and methods wherein analog voltages may be sampled and stored in a non-volatile manner for output, typically through parallel output buffers. In one form and in a single integrated circuit, an input provided to the circuit may be stored at any analog storage location as determined by an address also provided to the circuit, the storage location determining at which of the outputs of the circuit the stored value will appear. While the storage, achieved by way of storage of differential voltages in floating gate MOSFET devices, is non-volatile, the same is also electrically alterable as desired. Various alternate embodiments and methods including the ability to address multiple pages of analog storage locations for storage of analog signals and selective parallel output of each page of the storage, output enable capabilities, parallel inputs and digital inputs are disclosed.

Programmable non-volatile analog voltage source devices and methods

For use in integrated circuit systems wherein both filter time constants and oscillator frequency each need a suitable reference, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop. Because the fundamental control parameters of the oscillator and the filter are time-period and time-constant respectively, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type. This has the advantage of close tracking through process and ambient variations. Monolithic capacitors on the same chip are used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents. The monolithic implementation of the Control Block is such that by tuning the oscillator frequency to the appropriate value through setting of the respective control current, the filter time-constants also are appropriately set to satisfy the Nyquist criteria for a sampling rate referenced to the oscillator frequency. Trimming and tuning are accomplished by digital control to control the summing of appropriate current components after manufacture, such as by the programming of on-chip storage cells provided for this purpose.

Integrated mosfet resistance and oscillator frequency control and trim

For use in integrated circuit systems wherein both filter time constants and oscillator frequency each need a suitable reference, both the filter and the oscillator are referenced to common reference circuitry through a suitable control loop. Because the fundamental control parameters of the oscillator and the filter are time-period and time-constant respectively, the oscillator and the filter are implemented in a manner where the monolithic passive elements setting the fundamental control parameters (time-period and time-constant) are of the same type. This has the advantage of close tracking through process and ambient variations. Monolithic capacitors on the same chip are used as one of the common passive elements between the oscillatorand the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents. The monolithic implementation of the Control Block is such that by tuning the oscillator frequency to the appropriate value through setting of the respective control current, the filter time-constants also are appropriately set to satisfy the Nyquist criteria for a sampling rate referenced to the oscillator frequency. Trimming and tuning are accomplished by digital control to control the summing of appropriate current components after manufacture, such as by the programming of on-chip storage cells provided for this purpose.

Integrated MOSFET resistance and oscillator frequency control and trim

Integrated circuit system for analog signal recording and playback having improved performance and a very high level of integration. The integrated circuit is complete with preamplifier, automatic gain control, filter, fixed references including a band gap reference, trimming, power output amplifier, memory array, multiple closed loop sample and hold circuits, column decoder, column driver, row decoder, address counters, master oscillator and chip function timing circuits including sample clock, charge pumps, high voltage regulator and waveshapers, low VCC detector, power-on reset and recording reference circuits on a single chip. The system uses a writable analog reference scheme to put many error sources in the common mode, and provides a double ended output for maximum power output in a limited voltage range, and to allow direct connection to a speaker. Trim bits are provided for trimming the oscillator and filter so that the filter characteristics match and track the oscillator frequency and provision is made for absolute addressing and digital end of message markers. Programming is by way of a multi level iterative write process for high resolution.

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Santa Clara, CA, United States of America

Sakhawat M Khan