Nissan Motor Company Limited

Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Matsushita Electric Industrial Co., Ltd.

Saichirou Kaneko

Hideaki Tanaka

Masakatsu Hoshi

Tetsuya Hayashi

Manabu Yanagihara

Hiroto Yamagiwa

Ayanori Ikoshi

Yoshio Shimoida

Kenichiro Tanaka

Teruyoshi Mihara

Yoshinori Murakami

Masayuki Kuroda

Kazuyuki Sawada

Tetsuyuki Fukushima

Toshihiko Uno

Yuji Harada

Kraisorn Throngnumchai

Masahiko Niwayama

Tetsuji Yamashita

Yoshimi Shimizu

Ryusuke Kanomata

Kraisom Throngnumchai

In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion. An energy barrier is provided in a junction surface between the electrode portion and the second nitride semiconductor layer, the energy barrier indicating a rectifying action in a forward direction from the electrode portion to the second nitride semiconductor layer, and a bandgap of the second nitride semiconductor layer is wider than a bandgap of the first nitride semiconductor layer.

Semiconductor device

A nitride semiconductor device includes: a stacked structure portion having an active region; first and second main electrodes extending in a first direction; and a lead-out line (second lead-out line) electrically connected to the second main electrode and extends to one side in the first direction. The first main electrode has a first tip at an end which is on the side to which the lead-out line extends. The second main electrode has a second tip at an end which is on the side to which the lead-out line extends, and has, at a second tip-side in the first direction, a tapered portion having a width in a second direction which decreases with decreasing distance to the second tip. The lead-out line has a region projecting in the second direction from the tapered portion, and the first tip does not project further in the first direction than the second tip.

Nitride semiconductor device

An aspect of the present invention provides a semiconductor device that includes a first conductivity type semiconductor body, a source region in contact with the semiconductor body, whose bandgap is different from that of the semiconductor body, and which formed heterojunction with the semiconductor body, a gate insulating film in contact with a portion of junction between the source region and the semiconductor body, a gate electrode in contact with the gate insulating film, a source electrode, a low resistance region in contact with the source electrode and the source region, and connected ohmically with the source electrode, and a drain electrode connected ohmically with the semiconductor body.

Semiconductor device and manufacturing method thereof

An energy transmission device includes: a semiconductor device formed on a first semiconductor substrate; a semiconductor integrated circuit including a reverse current preventing diode and a control circuit; a DC voltage source; and a transformer. The reverse current preventing diode includes a reverse current preventing layer of a second conductivity type formed at a surface of a second semiconductor substrate, and a well layer of a first conductivity type formed in the second semiconductor substrate and covering the reverse current preventing layer. The transformer includes a primary winding connected in series with the semiconductor device and the DC voltage source, and a first secondary winding connected to a load. The energy transmission device is configured so that electric power is supplied from the first secondary winding of the transformer to the load. A second drain electrode of the semiconductor device is electrically connected to the reverse current preventing layer.

Semiconductor device, and energy transmission device using the same

A high-breakdown voltage semiconductor switching device includes a resurf region of a second conductivity type; a base region of a first conductivity type formed to be adjacent to the resurf region; an emitter/source region of the second conductivity type formed in the base region to be spaced from the resurf region; a gate electrode formed to cover a portion of the emitter/source region and a portion of the resurf region; a drain region of the second conductivity type formed in the resurf region to be spaced from the base region; and a collector region of the first conductivity type formed in the resurf region to be spaced from the base region. Furthermore, it includes an electrode connected to the collector region and the drain region and an electrode connected to the base region and the emitter/source region.

High-breakdown voltage semiconductor switching device and switched mode power supply apparatus using the same

Disclosed is a semiconductor device including: an N-type RESURF region formed in a P-type semiconductor substrate; a P-type base region formed in an upper portion of the semiconductor substrate so as to be adjacent to the RESURF region; an N-type emitter/source region formed in the base region so as to be apart from the RESURF region; a P-type base connection region formed in the base region so as to be adjacent to the emitter/source region; a gate insulating film and a gate electrode overlying the emitter/source region, the base region, and the RESURF region; and a P-type collector region formed in the RESURF region so as to be apart from the base region. Lattice defect is generated in the semiconductor substrate such that a resistance value of the semiconductor substrate is twice or more the resistance value of the semiconductor substrate that depends on the concentration of an impurity implanted in the semiconductor substrate.

Semiconductor device with substrate having increased resistance due to lattice defect and method for fabricating the same

A silicon carbide semiconductor device is provided with a semiconductor substrate () of silicon carbide of a first conductivity type, a hetero semiconductor region () forming a hetero-junction with the semiconductor substrate (), an insulated gate including a gate electrode () and a gate insulator layer () formed on the semiconductor substrate () and adjoining to the hetero semiconductor region (), a source electrode () electrically connected to the hetero semiconductor region () and a drain electrode () electrically connected to the semiconductor substrate ().

Silicon carbide semiconductor device

A high voltage semiconductor device having a high current gain hFE is formed with a collector region () of a first conduction type, an emitter region () of the first conduction type, and a base region () of a second conduction type opposite to the first conduction type located between the collector region and the emitter region. The free carrier density of the base region () where no depletion layer is formed is smaller than the space charge density of a depletion layer formed in the base region ().

An ion-through regionis provided as a first opening in a passivation filmon a source electrodeand a drain electrode. The passivation filmis coated with a sealing resin to package the semiconductor device. At this point, the ion-through regionis filled with the sealing resin to put the sealing resin into direct contact with the source electrodeand the drain electrode. With this structure, movable ions accumulated at an interface of the sealing resin with the passivation filmin a high temperature and high humidity atmosphere are discharged to the source electrodeand the drain electrodevia the ion-through regionand thus do not influence an N-type extended drain region. Therefore, the drain breakdown voltage can be improved.

Semiconductor device having a high breakdown voltage transistor formed thereon

The present invention-provides a tunnel-injection device which encompasses, a reception layer made of a first semiconductor, a barrier-forming layer made of a second semiconductor having a bandgap-narrower than the first semiconductor, being in metallurgical contact with the reception layer, a gate insulating film disposed on the barrier-forming layer. The gate electrode controls the width of the barrier generated at the heterojunction interface between the reception layer and the barrier-forming layer so as to change the tunneling probability of carriers through the barrier. The device further encompasses a carrier receiving region being contact with the reception layer and a carrier-supplying region being contact with the barrier-forming layer.

Insulated gate tunnel-injection device having heterojunction and method for manufacturing the same

A high reverse voltage diode includes a hetero junction made up from a silicon carbide base layer, which constitutes a first semiconductor base layer, and a polycrystalline silicon layer, which constitutes a second semiconductor layer, and whose band gap is different from that of the silicon carbide base layer. A low concentration N type polycrystalline silicon layer is deposited on a first main surface side of the silicon carbide base layer, and a metal electrode is formed on a second main surface side of the silicon carbide base layer which is opposite to the first main surface side thereof.

Growing community of inventors

Kyoto, Japan

Saichirou Kaneko