Cadence Design Systems, Inc.

Saibal Saha

Jianyu Li

Walter J Ghijsen

Jaideep Mukherjee

Yishan Wang

Jushan Xie

Donald John O'Riordan

Richard John O'Donovan

John O'Donovan

A method for simulating an integrated circuit design is provided. The method includes executing a characterization tool over a first portion of a parameter space of a circuit design to form a netlist associated with the first portion of the parameter space. The method also includes forming a first sub-netlist from the netlist, selecting, for the first sub-netlist, a condition from at least one of a process, a voltage, or a temperature condition, and at least one parameter from the first portion of the parameter space. The method further includes executing a simulation of the first sub-netlist in a selected solver mode using the condition and the at least one parameter, and incorporating a result of the simulation in a circuit performance report, wherein the result is associated with the condition, with the at least one parameter, and with the first sub-netlist.

Integrated circuit simulation with efficient memory usage

A method for simulating an integrated circuit (IC) is provided. The method includes parsing an IC and loading the IC into memory and forming a table model including parameter values for at least one circuit component in the IC, the parameter values selected from a portion of a parameter space, storing a data value associated with the parsing of the IC and the table model in a database accessible through a cloud computing environment, the data value comprising a metadata associated with the data value, loading, to a processor, at least one of the data value or the metadata from the database, modifying the data value or the metadata that is loaded in the processor, according to the portion of the parameter space, and performing an analysis on at least one block of the IC according to the data value or the metadata that is loaded in the processor.

Integrated circuit simulation with data persistency for efficient memory usage

A method for simulating an integrated circuit design is provided. The method includes forming a partition of an IC netlist into blocks based on a performance value from at least a portion of a parameter space and forming a table with parameter values including multiple instances of at least one block of the partition. The computer-implemented method also includes analyzing a direct-current (DC) solution of at least one block by combining at least a first instance of a first block with a second instance of a second block based on the performance value from the portion of the parameter space, and performing a transient analysis where signals change over time for the at least one block.

Integrated circuit simulation with variability analysis for efficient memory usage

A system, method, and computer program product for facilitating model binning in circuit simulators. Embodiments enable specification of models spanning binning dimensions, such as device width and length, in a model group via inheritable model bins. New simulator modeling syntax and semantics eliminate much of the redundancy and parsing overhead from model parameter specifications in foundry process design kits. Indirect and optional inheritance is also enabled, allowing for fine grain and coarse grain grids in the same model group.

Spice model bin inheritance mechanism

A system, method, and computer program product for extending device model parameter specification flexibility when using a subcircuit wrapper. Embodiments facilitate device modeling by allowing a modeling engineer to eliminate the explicit specification of a large set of wrapped device instance parameters as parameters to the subcircuit wrapper itself. A circuit designer may now use the subcircuit wrapper to specify an instance of the subcircuit without having to explicitly provide values for all such parameters. The simulator program's built-in device model calculates its default parameter values, which are often the result of complex expressions involving the other parameters, resulting in more accurate simulations. Subcircuit wrappers no longer need to be explicitly regenerated when a new version of the wrapped device model becomes available for the simulator (e.g., one that supports additional instance parameters that were not present on the earlier version when the subcircuit wrapper was created).

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San Jose, CA, United States of America

Saibal Saha