Qualcomm Incorporated

M2 Networks, Inc.

Other

Ultrawave Labs, Inc.

Sai Kwok

Prasad S Gudem

Reza Shahidi

Parthasarathy Krishnamoorthy

Anand Rajurkar

Francis Ming-Meng Ngai

Steven C Ciccarelli

Jose Cabanillas

Aly Mamdouh Ismail

Ken Tsz Kin Mok

David Love

Francis Carr

Various embodiments leverage the typical manner in which a RAT selects a supported frequency band listed in its acquisition database and the standard communications with its network indicating the supported frequency bands to avoid potential coexistence events with one or more other RATs. In particular, various embodiments include methods for avoiding band interference between RATs operating on a multi-SIM communication device by identifying the frequency bands available to each of the RATs, comparing the identified frequency bands to determine whether any RAT's frequency bands will interfere with one or more other RAT's frequency bands, and in response to determining that there is a possibility of frequency band interference, removing those interfering frequency bands from that RAT's acquisition database. As a result, during standard communications, that RAT will report to its network that it supports only non-interfering frequency bands.

Preventing coexistence interference through smart band selection in MSMA devices

A wireless device configured for simultaneous voice and data communications is described. The wireless device includes a voice and data transceiver. The voice and data transceiver includes data path circuitry, voice path circuitry, a first multiplexer and a second multiplexer. The first multiplexer sends a primary data receive signal to the data path circuitry and receives a data transmit signal from the data path circuitry. The second multiplexer sends a diversity data receive signal to the data path circuitry, sends a voice receive signal to the voice path circuitry and receives a voice transmit signal from the voice path circuitry. The wireless device also includes a first antenna coupled to the first multiplexer. The wireless device further includes a second antenna coupled to the second multiplexer.

Simultaneous voice and data communication

This invention uses one or more cancellation modules to eliminate the transmitter leakage at the output of the receive antenna and prior the receiver circuitry so that the received signals can be analyzed without degradation in quality due to simultaneous operation of the transmitter and receiver. Each cancellation circuit could be limited to only 30-50 dB of rejection due to component mismatches and other circuit non-idealities. To obtain further cancellation, more than one cancellation circuit can be applied after the first low noise amplifier. The output of the low noise amplifier can be repeatedly mixed with additional cancellation signals 'n' number of times such that the 'n' low noise amplifier is mixed with the &#x201c;n&#x201d; cancellation signal. For each additional cancellation signal added a 20-30 dB reduction in noise may be achieved such that cascading three or four cancellation signals from cancellation modules may produce a 150 dB gain.

High dynamic range transceiver

An integrated circuit for achieving power reduction in a transceiver may include a jammer detector that determines an interference level corresponding to a received signal, and a transmit power detector that determines a required transmit power level for a transmitted signal. The integrated circuit may also include at least one of the following: a process monitor that determines process corners of components within the receiver and/or the transmitter, and a temperature monitor that determines a temperature of the receiver and/or the transmitter. The integrated circuit may also include a state machine. The state machine may transition the receiver from a high linearity mode to a low linearity mode if a set of operating conditions is satisfied. Similarly, the state machine may transition the transmitter from a high power mode to a low power mode if a set of operating conditions is satisfied.

Methods and apparatus for power reduction in a transceiver

Techniques for mitigating interference from a switching voltage regulator by intelligently varying the switcher frequency of the switching voltage regulator are provided. In one aspect, the switcher frequency is set by adjusting a frequency setting input to a programmable clock divider. In a further aspect, a processor drives a programmable clock divider which receives a value representative of a dividing factor by which to divide a reference clock frequency signal to generate a desired switcher frequency for the switching voltage regulator. Values of the programmable clock divider are selectively varied to achieve optimal performance and mitigate the effect of switcher frequency spurious content for a given operating condition or conditions.

Switching voltage regulator with frequency selection

A wireless communication device incorporating a set of comparators and logic interrupt into the local oscillator generation circuit block is described. In one design, the local oscillator circuit block includes a RF VCO with coarse and fine frequency tuning. The RF VCO fine frequency tuning signal is monitored continuously to determine if the control voltage is within specified limits. If the RF VCO fine frequency tuning voltage is too low or too high for the RF VCO to meet system requirements or lock on the current desired frequency, an interrupt signal is asserted. In response to the interrupt signal, a wireless communications processor or a hardware state machine initiates coarse frequency calibration of the RF VCO at the desired frequency. After coarse frequency calibration has completed, the RF VCO fine frequency tuning voltage is within specified limits and is continuously monitored.

Frequency calibration of radio frequency oscillators

Techniques for attenuating undesired signal components from a differential duplexer are described. The duplexer provides a differential received signal at RX+ and RX&#x2212; ports. This differential received signal includes an undesired common mode signal, which may come from a transmit signal. The common mode signal is attenuated with a common mode trap in an impedance matching network coupled to the RX+ and RX&#x2212; ports. The matching network includes a first passive circuit coupled between the RX+ port and a first node, a second passive circuit coupled between the RX&#x2212; port and a second node, and the common mode trap coupled between the first and second nodes. In one design, the common mode trap includes a first inductor coupled between the first node and a common node, a second inductor coupled between the second node and the common node, and a capacitor coupled between the common node and circuit ground.

Common mode signal attenuation for a differential duplexer

A frequency multiplier circuit is provided that does not rely on filtering to remove unwanted harmonics and spurious content. In one implementation, a frequency doubler comprises a first rectifier doubler stage adapted to receive a first input signal having a first frequency and output a first rectified signal having multiple harmonics; a second rectifier doubler stage adapted to receive a second input signal having the first frequency and offset in phase from the first input signal and to output a second rectified signal, which has the multiple harmonics and is offset in phase from the first rectified signal; and a differential amplifier stage adapted to sum the first and second rectified signals to produce an output signal including a desired output harmonic having a frequency that is double the first frequency. The summing results in the substantial cancellation of unwanted output harmonics in the output signal.

Rectifier type frequency doubler with harmonic cancellation

An R-C polyphase network that provides bandpass shaping and amplification to maintain the quadrature phase output is provided. In one implementation, a polyphase device comprises two transistors each having a collector, a base and an emitter. Positive and negative components of an input signal are coupled to a respective base of the transistors, the transistors adapted to drive the R-C polyphase network. Inputs of the R-C polyphase network are coupled to the collectors of the transistors. The R-C polyphase network includes an inductor and has first output and a second output offset in phase. The inductor is adapted to provide bandpass filtering of the first output and the second output to reduce harmonics and spurious content in the output, as well as provide amplification of the outputs relative to the input signal.

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Escondido, CA, United States of America

Sai Kwok