Tower Semiconductor Ltd.

Sagy Levy

Sharon Levin

David Mistele

Noel Berkovitch

Alexey Heiman

Daniel Sherman

Johnatan A Kantarovsky

Jolly Gurvinder

A LDMOS transistor that may include (i) a first region that is a reduced surface field (RESURF) implant region of a first type; (ii) a second region that is a RESURF implant region of a second type, wherein the first type differs from the second type; (iii) a gate; (iv) a stepped oxide region and a gate oxide region that are positioned above the first region and below the gate. Each one of the first region and the second region has a substantially uniform thickness

Lateral diffused metal oxide semiconductor field effect (LDMOS) transistor and device having LDMOS transistors

Some demonstrative embodiments include a Metal-Oxide-Semiconductor (MOS) transistor including a multi-split gate. For example, an Integrated Circuit (IC) may include at least one MOS transistor, the MOS transistor may include a source; a drain; a body; and a multi-split gate including a control gate component configured to control conductivity of the MOS transistor, and at least first and second field plate gate components, the first field plate gate component is electrically isolated from the second field plate gate component, the first and second field plate gate components are electrically isolated from the control gate.

Apparatus of a metal-oxide-semiconductor (MOS) transistor including a multi-split gate

A semiconductor die that may include a substrate; an epitaxial layer; a metal layer; a first transistor; and a metal via that surrounds the first transistor, extends between the metal layer and the substrate, and penetrates the substrate.

Semiconductor die with a metal via

A laterally diffused metal oxide semiconductor (LDMOS) device that may include an oxide region that comprises a bottom surface; a drain that is positioned between a left drift region and a right drift region and below the bottom surface; wherein the oxide region further comprises a first sloped surface and a second sloped surface; wherein a first angle between the first sloped surface and the bottom surface does not exceed twenty degrees; and wherein a second angle between the second sloped surface and the bottom surface of the oxide region does not exceed twenty degrees.

LDMOS device having a low angle sloped oxide

A double-RESURF LDMOS transistor has a gate dielectric structure including a shallow field 'bump' oxide region and an optional raised dielectric structure that provides a raised support for the LDMOS transistor's polysilicon gate electrode. Fabrication of the shallow field oxide region is performed through a hard 'bump' mask and controlled such that the bump oxide extends a minimal depth into the LDMOS transistor's drift (channel) region. The hard &#x201c;bump&#x201d; mask is also utilized to produce an N-type drift (N-drift) implant region and a P-type surface effect (P-surf) implant region, whereby these implants are &#x201c;self-aligned&#x201d; to the gate dielectric structure. The N-drift implant is maintained at Vdd by connection to the LDMOS transistor's drain diffusion. An additional Boron implant is utilized to form a P-type buried layer that connects the P-surf implant to the P-body region of the LDMOS transistor, whereby the P-surf implant is maintained at 0V.

Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate 'bump' structure

A double-RESURF LDMOS fabrication method utilizes a shared mask to form separately patterned N+ buried layer (NBL) and P+ buried layer (PBL) regions. The mask includes two opening types (e.g., large and small), and the P-type and N-type implant materials are separately directed onto the mask at different implant angles, such that the N-type implant passes through both opening types to form a first pattered implant region in both a first region and a surrounding second region, and such that the P-type implant material passes only through the larger openings and forms a second pattered implant region only in the first substrate portion. An optional epitaxial layer is deposited over the substrate and annealed to form the separately patterned PBL and NBL in the epitaxial layer, where a portion of the PBL diffuses above the NBL and forms a P-surf region below the LDMOS's N-drift region.

Growing community of inventors

Zichron-Yaakov, Israel

Sagy Levy