Intel Corporation

Sagar C Pawar

Ravindra A Babu

Prakash Pillai

Sashank Ms

Satyanantha Ramagopal Musunuri

Kalyan K Kaipa

Aneesh A Tuljapurkar

Sameer Kp

Raghavendra N

Vijayakumar Balakrishnan

Pannerkumar Rajagopal

Ovais F Pir

Karunakara Kotary

Krishnakumar Varadarajan

Samarth Alva

Yogesh Channaiah

Anantha Narayanan

Raghavendra Nagaraj

Panner Kumar

Murali R Iyengar

Satyanantha R Musunuri

Murali Iyengar

Pir Ovais

Rajagopal Pannerkumar

Methods and apparatus for adaptive keyboard scanning are disclosed. A disclosed example apparatus to adaptively control operation of a keyboard includes at least one memory, instructions, and processor circuitry. The processor circuitry is to determine whether to operate the keyboard in a first mode or in a second mode different from the first mode, the first mode corresponding to a first number of keys, the second mode corresponding to a second number of keys less than the first number of keys, and set the keyboard to operate in the first mode or the second mode based on the determination.

Methods and apparatus for adaptive keyboard scanning

When the speed of head movement exceeds the processing capability of the system, a reduced depiction is displayed. As one example, the resolution may be reduced using coarse pixel shading in order to create a new depiction at the speed of head movement. In accordance with another embodiment, only the region the user is looking at is processed in full resolution and the remainder of the depiction is processed at lower resolution. In still another embodiment, the background depictions may be blurred or grayed out to reduce processing time.

Compensating for high head movement in head-mounted displays

A Peripheral Component Interface Express (PCIe) card includes a circuit board, a device mounted on the circuit board, and a PCIe processor mounted on the circuit board. The PCIe processor is communicatively coupled to the device and a host processor of a host system. The PCIe processor is configured to detect a power signal on an auxiliary (AUX) power rail of the PCIe card. A periodic detection of a state of the device is performed based on detecting the power signal on the AUX power rail. A signal indicative of the state of the device is encoded for transmission to the host processor of the host system. PCIe link training is performed via a PCIe interface with the host system. The PCIe link training is initiated based on the signal indicative of the state of the device.

PCIe deterministic link training using OOB communications and enumeration optimization during different power-up states

A power-management scheme where when a system-on-chip (SoC) is in an active state, control and monitoring logic or circuitry turns off all wake logic or circuits for various associated intellectual property (IP) blocks. Based on user defined operating system power manager (OSPM) policies, OSPM kicks off an interrupt to the control and monitoring logic or circuitry to turn off or power gate the wake logic for individual IP blocks in the SoC. As such, wake logic that are idle in active state (e.g., S0 state) and would otherwise draw power in the S0 state are now turned off, thus saving power and/or extending battery life for the system. When the SoC is in a low power state, then the control and monitoring logic or circuitry selectively turns on the wake logic for the associated IP blocks based on detected user presence for the computing system having the SoC.

Power management of a processor and a platform in active state and low power state

Systems, apparatuses and methods may provide for technology that includes a substrate, and a display pipeline coupled to the substrate. The display pipeline may to barrel an initial image to form a barreled image.

Barreling and compositing of images

Described is a system where memory can be allocated for use by an adapter pre-boot and preserved for use post-boot. A BIOS can allocate for pre-boot hardware operations (e.g., graphics drivers, framebuffers, etc.) and mark this allocated memory as preserved. An indication of the allocated memory can be provided for an OS, such that post-boot, the OS can reclaim and reallocate this memory.

Reclaiming and reusing pre-boot reserved memory post-boot

Illustrative examples include a system for coupling a first electronic device to a second electronic device. The first electronic device may include a housing having a first engagement surface and a first magnet array. The first engagement surface may be adapted to receive the second electronic device. The second electronic device may include a second magnet array. An actuator coupled to the first magnet array may move the first magnet array relative to the housing and the second magnetic array, to attractively couple or repulsively de-couple the second electronic device from the first electronic device.

Coupling systems and methods for electronic devices

In some examples, an apparatus to authenticate a battery includes a battery voltage monitor to monitor a voltage of the battery. The apparatus to authenticate the battery also includes a voltage source regulator to filter the voltage of the battery and provide the filtered voltage to turn on circuitry to be used to authenticate the battery.

Safe battery authentication

Systems, apparatuses and methods may provide for technology that includes a microcontroller to control a workload of a graphics processor, to determine if at least one predetermined condition is met, and instruct, if the at least one predetermined condition is met, the graphics processor to transform an initial frame into an intermediate frame.

Intermediate frame generation

Technologies for synchronized overclocking setting between multiple networked computing devices include a master computing device and multiple slave computing devices communicating over a network. The master computing device establishes a connection with the slave computing devices. Establishing the connection may include synchronizing the slave computing devices with a master time clock of the master computing device. The master computing device determines its own overclocking setting and requests overclocking settings from the slave computing devices. The overclocking settings may include processor frequency, processor voltage, or other overclocking parameters. The master computing device determines a best overclocking setting from its own overclocking setting and the overclocking settings received from the slave computing device. The master computing device advertises the best overclocking setting to the slave computing devices. The slave computing devices may implement the best overclocking setting. Other embodiments are described and claimed.

Growing community of inventors

Bengaluru, India

Sagar C Pawar