Sun Microsystems, Inc.

Saed Muhssin

Gary F Feierbach

Norman M Hayes

Yanhua Sun

Marcel Dignum

A computer system includes a central processing unit with an internal memory controller. The internal memory controller interacts with an external cache and a primary memory through a single unified memory bus. The internal memory controller generates a shared row address that is applied to the unified memory bus during an address fetching operation to simultaneously access a row in primary memory and an address in external cache. The internal memory controller may also generate a shared column address that is applied to the unified memory bus during a data return operation to simultaneously specify a column in primary memory and an address in external cache.

Growing community of inventors

San Francisco, CA, United States of America

Saed Muhssin