Kabushiki Kaisha Toshiba

Sadao Imada

Yoshio Okada

Mitsuru Shimizu

An input protection circuit for MOS devices includes a first resistor and a first parasitic bipolar transistor connected between an input pad and an input buffer circuit of a MOS device. The input protection circuit for MOS devices further includes a second resistor and a second parasitic bipolar transistor connected at a preceding stage of the input buffer circuit so that the gate oxide film of the input buffer circuit can be protected from being damaged by static charges or a voltage which is accidentally generated, without increasing the pattern size of the first parasitic bipolar transistor.

Growing community of inventors

Yokohama, Japan

Sadao Imada