Nec Corporation

International Superconductivity Technology Center

Sumitomo Electric Industries, Limited

Sadahiko Miura

Tetsuhiro Suzuki

Tadahiko Sugibayashi

Kaoru Mori

Youichi Enomoto

Hideaki Numata

Tadataka Morishita

Nobuyuki Ishiwata

Shoji Tanaka

Shigeyuki Iwasa

Shunsuke Fukami

Katsumi Suzuki

Kentaro Nakahara

Jiro Iriyama

Norikazu Ohshima

Yukiko Morioka

Masahiro Suguro

Yoichi Miyasaka

Eiji Kariyada

Hironobu Tanigawa

Kiyotaka Tsuji

Takayuki Inoue

Yuki Kusachi

Shogo Matsubara

Koji Muranaka

Hideaki Zama

A magnetoresistive effect element of the present invention includes: a domain wall motion layer, a spacer layer and a reference layer. The domain wall motion layer is made of ferromagnetic material with perpendicular magnetic anisotropy. The spacer layer is formed on the domain wall motion layer and made of non-magnetic material. The reference layer is formed on the spacer layer and made of ferromagnetic material, magnetization of the reference layer being fixed. The domain wall motion layer includes at least one domain wall, and stores data corresponding to a position of the domain wall. An anisotropy magnetic field of the domain wall motion layer is larger than a value in which the domain wall motion layer can hold the perpendicular magnetic anisotropy, and smaller than an essential value of an anisotropy magnetic field of the ferromagnetic material of the domain wall motion layer.

Magnetoresistive effect element and magnetic random access memory using the same

Disclosed is a polyradical compound which can be used as an electrode active material for at least one of a positive electrode and a negative electrode. The polyradical compound has a repeating unit represented by general formula (1) and is crosslinked using a bifunctional crosslinking agent having two polymerizing groups in the molecule represented by general formula (2), wherein Rto Reach independently represent hydrogen or methyl group; Rto Reach independently represent C1 to C3 alkyl group; X represents single bond, linear, branched or cyclic C1 to C15 alkylenedioxy group, alkylene group, phenylenedioxy group, phenylene group or structure represented by general formula (3); and Rto Reach independently represent hydrogen or methyl group, and k represents an integer of 2 to 5. 

Process for producing polyradical compound and battery cell

MRAM includes a first wiring, a second wiring, and a memory cell. The first wiring extends to a first direction, and the second wiring extends to a second direction. The memory cell includes a free magnetic layer in which a plurality of magnetic layers coupled anti-ferromagnetically through non-magnetic layers are laminated, and is provided at an intersection of the first and second wirings. The magnetization direction of the free magnetic layer is different from the first and second directions. The writing method includes (a) reading a first data stored in the memory cell; (b) comparing a second data to be written to the memory cell and the first data; and (c) changing a direction of a first write current supplied to the first wiring and a direction of the second write current to be supplied to the second wiring, when the first data and second data are different.

Magnetic random access memory

A magnetic random access memory is provided including a substrate, a magnetoresistance element which includes a ferromagnetic layer having an invertible spontaneous magnetization, which varies in resistance according to the direction of the spontaneous magnetization, and is formed above the substrate, and a wiring which extends in a first direction and is used for making an electric current flow to generate a magnetic field to be applied to the magnetoresistance element. The wiring is formed so as to pass through a first position which is closer to the substrate than the magnetoresistance element and does not overlap the magnetoresistance element when viewed from a direction perpendicular to the main surface of the substrate, and a second position being above said magnetoresistance element.

Magnetic random access memory and method for manufacturing the same

A magnetic memory is composed of: a magnetoresistance element including a free magnetic layer; a first interconnection extending in a first direction obliquely to an easy axis of the free magnetic layer; a second interconnection extending in a second direction substantially orthogonal to the first direction; and a write circuit writing data into the free magnetic layer through developing a first write current on the first interconnection, and then developing a second write current on the second interconnection with the first write current turned on. The free magnetic layer includes: first to N-th ferromagnetic layers and first to (N&#x2212;1)-th non-magnetic layers with N being equal to or more than 4, the i-th non-magnetic layer being disposed between the i-th and (i+1)-th ferromagnetic layers with i being any of natural numbers equal to or less than N&#x2212;1. The free magnetic layer is designed so that antiferromagnetic coupling(s) between the j-th and (j+1)-th ferromagnetic layers is stronger than that between the first and second ferromagnetic layers, j being any of integers ranging from 2 to N&#x2212;2.

Magnetic memory adopting synthetic antiferromagnet as free magnetic layer

A technology for eliminating the defects in a tunnel insulation film of magnetic tunnel junction and for suppressing generation of a defective bit in an MRAM using magnetic tunnel junction in a memory. The magnetic memory includes a substrate, an interlayer insulation film covering the upper surface side of the substrate, memory cells, and plugs penetrating the interlayer insulation film. The memory cell includes a first magnetic layer formed on the upper surface side of the interlayer insulation film, a tunnel insulation layer formed on the first magnetic layer, and a second magnetic layer formed on the tunnel insulation layer. The plug is connected electrically with the first magnetic layer. The tunnel current passing part of the tunnel insulation layer located between the first and second magnetic layers is arranged, at least partially, so as not to overlap the plug in the direction perpendicular to the surface of the substrate.

Magnetic memory, and its operating method

A magnetic random access memory circuit comprises first and second row decoders receiving a part of a given address, first and second column decoders receiving the other part of a given address, a plurality of pairs of sense lines connected between output terminals of the first row decoder and output terminals of the second row decoder, each pair of sense lines being located adjacent to each other, a plurality of word lines connected between output terminals of the first column decoder and output terminals of the second column decoder, and extending to intersect the sense lines so that intersections of the sense lines and the word lines are located in the form of a matrix. A memory array includes a plurality of cell pairs distributed over the matrix, each cell pair including a memory cell and a reference cell located adjacent to each other. Each of the memory cell and the reference cell includes a magneto-resistive element. The memory cell and the reference cell of each cell pair are located at intersections of one word line and one pair of sense lines, respectively. The memory cell of the each cell pair is connected between one sense line of the one pair of sense lines and the one word line, and the reference cell of the each cell pair is connected between the other sense line of the one pair of sense lines and the one word line.

Magnetic random access memory circuit

In a high frequency transmission line having a dielectric substrate and a conductor line which is provided on the dielectric substrate for allowing electric current to flow therethrough, the conductor line has a non-grain-boundary oxide superconductor layer with twin walls but without grain boundaries. The high frequency transmission line is in the form of a plane circuit. It is preferable that an oriented oxide superconductor layer is provided between the dielectric substrate and the non-grain-boundary oxide superconductor layer.

High frequency transmission line capable of improving an intermodulation

The present invention provides a superconducting transmission delay line phase shifter which has an essential structure as follows. The superconducting transmission delay line phase shifter has a layer made of a material showing a low dielectric loss the layer comprising first, second and third sections, wherein the second section being positioned between the first and third sections. The superconducting transmission delay line phase shifter also has a ferroelectric selectively provided in the second section. The ferroelectric extends between boundaries of the second section to the first and third sections. The superconducting transmission delay line phase shifter also has a thin film made of a conductor having a high conductivity. The conductive thin film extends across the bottoms of the first, second and third sections. The superconducting transmission delay line phase shifter also has a superconducting signal transmission line, on which signals are transmitted. The superconducting signal transmission line comprises a signal input section, a phase shifting section jointed with the signal input section where transmission signals show phase shift in the phase shifting section, and a signal output section connected to the phase shifting section. The signal input section is at least in contact with the first section and the signal input section is level in relation to the top of the first section. The signal output section is at least in contact with the third section and the signal output section is level in relation to the top of the third section. The phase shifting section is at least in contact with the ferroelectric and the phase shifting section is level in relation to the top of the ferroelectric.

Superconducting transmission line phase shifter having a V.sub.3 Si

The present invention can provide an oxide superconductive film with a smooth surface and at homogeneous thickness on a simple substrate structure at a high film formation rate. In a liquid phase epitaxial growth method for producing an ReBa.sub.2 Cu.sub.3 Ox film (3) (Rerepresents one selected from lanthanoids such as Y and Nd, and X represents the oxygen amount) having a 123 type crystal structure from a molten liquid (1), a substrate (2) surface is inclined by 1 degree to 44 degrees with respect to the molten liquid surface at the time of separating the film from the molten liquid after film formation. After separating the film from the molten liquid, the substrate is rotated at 300 rpm to 3000 rpm for 5 seconds to 5 minutes. The film formation atmosphere contains 2 at. % of oxygen and 98 at. % of nitrogen, and the film formation temperature is 900 to 970.degree. C.

Production method of oxide superconductive film

An electronic device substrate includes a spinel epitaxial film formed on a silicon single-crystal substrate and an oxide superconductor layer formed on the spinel film. The oxide superconductor layer is represented by formula P.sub.x (Q,Ca).sub.y Cu.sub.z O.sub..delta. and contains at least one element of Bi and Tl as P and at least one element of Sr and Ba as Q. Composition ratios fall within ranges of 0.08.ltoreq.x/(x+y+z).ltoreq.0.41, 0.29.ltoreq.y/(x+y+z).ltoreq.0.47 and 1.ltoreq.Q/Ca.ltoreq.3.

Growing community of inventors

Tokyo, Japan

Sadahiko Miura