Pioneer Electronic Corporation

Hitachi, Ltd.

Saburo Takaoka

Fumihiko Yokogawa

Youichiro Tsuda

Ryozi Higashi

Masaki Saito

Ryuichi Naito

Hiroyuki Hirano

Tsuyoshi Fujiwara

Yoshifumi Saeki

Tsutomu Suzuki

Hiroki Uemura

Haruyuki Inohana

Minoru Kosaka

Tsutomu Fukui

Tadahiro Yamaguchi

Youichi Ogawa

Shozo Nakamuta

Sumitaka Matsumura

Seiji Hashimoto

Norikazu Fujie

Takashi Morii

Toshihiko Hosaka

Tetuo Kanazashi

Osamu Tazawa

Katsuaki Matsumoto

Kuniaki Shiratori

Morihisa Oka

Hideaki Takada

In a waveform equalization circuit, a digital signal is applied through a first network having a transfer function defined by four angular frequencies to one of the inversion and non-inversion input terminals of an amplifier and through a second network having a transfer function made up of a constant to the other input terminal, so that the digital signal subjected to waveform equalization is provided at the output terminal, whereby according to the transfer characteristic of the recording or reproducing system, the most suitable waveform equalization characteristic can be obtained with ease.

Waveform equalization circuit for a magnetic reproducing device

A data reading device for reading out data modulated according to a system wherein the time ratio of low to high level signals is substantially unity employs a time ratio detector and an intermediate level detector. A comparator compares the reproduced output level with a synthesized signal which may represent a combination of the outputs of the time ratio detector and the intermediate level detector.

Digital modulation signal reading device

A tone control circuit includes a variable gain amplifier circuit, a first mixer combining the variable gain amplifier output with a tone control circuit input and providing its output signal to the variable gain amplifier input, and a second mixer combining the outputs of the first mixer and variable gain amplifier. The mixers may be either adders or subtractors as long as the natural logarithm of the overall gain of the tone control circuit varies substantially linearly with changes in the feedback ratio of the variable gain amplifier.

Tone control circuit utilizing variable gain amplifier

A tone control arrangement is disclosed which is suitable for use in various sound reproducing instruments and in which the signal-to-noise ratio of the reproduced sound can be improved by controlling the frequency response of the audible signal with a variable d.c. voltage source. Frequency response control by a single d.c. control voltage is achieved by connecting in series and in order a first mixer, passive circuit network having a signal transmission characteristic determined by the desired frequency response of the output sound signal to be reproduced, a multiplier and a second mixer. The inverting inputs of the first and second mixers both receive the output of the multiplier, while the non-inverting input of the first mixer receives the input audio signal. The non-inverting input of the second mixer receives either the output of the first mixer or the input audio signal. Finally, the second input to the multiplier is provided by a variable d.c. voltage source. Tone control is achieved through a single control member even in the case of multi-channel systems by either using a single potentiometer wiper in common as the second input to each of the multipliers in the respective channels, or by ganging together a plurality of potentiometer wipers for control by a single member.

Tone control arrangement for use in sound reproducing instruments

A two-way CATV system having a substantial number of terminals incorporates a central processor and transmitter system which continually interrogates the terminals at high speed, monitoring changes of usage of premium programs and other data while also permitting central control of access to restricted premium programs. For inexpensive but reliable intercommunication, short, fixed word length digital messages are frequency multiplexed onto the cable in both upstream and downstream directions, and subscriber groups are controllably selected in turn, with each subscriber being scanned in what may be an arbitrary order by transmission of unique private messages which are recognized at the terminal and in response to which previously prepared fixed length messages are immediately transmitted in return. By employing both upstream and downstream messages which are initiated by a series of synchronizing bits and non-ambiguously related subsequent data sequences, and by the provision of means to initiate both downstream and upstream messages of short length without delay, rapid but reliable data interchange is effected despite differences in transmission and response times with different subscribers. Concurrently, terminal status and various special conditions including security alarms are remotely processed at each terminal, and short upstream messages are assembled containing priority selected data to be transmitted in response to an interrogation. The system incorporates additional means for monitoring power status, program selection and authorization and other operating conditions at each terminal effectively to provide accurate and reliable accounting information while preventing unauthorized or improper usage of restricted premium programs.

Interactive CATV system

An output waveform of a manually operable tuning pulse generator of an electronic preset type tuning control device of a tuner using varactor diodes for a multi-band radio receiver is improved by using Schmitt trigger circuit means which may be provided with a trigger level checking circuit, both being provided as IC.

Device for improving output waveform of manually controllable pulse

A period-to-voltage converting device for producing an output voltage corresponding to the varying period of an input signal. The input signal is applied to a frequency divider and a simple logic circuit to control the charging and discharging of first and second capacitors. A charging circuit responsive to a first timing pulse having a width equal to half a period of an input signal charges the first capacitor to a predetermined voltage. A discharging circuit responsive to a second timing pulse having a width equal to the period of the input signal discharges the first capacitor at a constant rate. Another charging circuit responsive to a third timing pulse having a width equal to half a period of the input signal charges the second capacitor to the same voltage across the first capacitor, this voltage being the output voltage proportional to the period of the input signal.

Period-to-voltage converting device

A speed-and-phase control circuit for a rotary machine. A frequency divider is responsive to an input signal whose frequency is proportional to the revolution number of the rotary machine. The frequency divider provides as a first output signal a frequency-divided version of the input signal. A logical circuit is responsive to the input signal and to the first output signal. The logical circuit provides in timed relationship first, second and third timing pulses. The pulse width of the first timing pulse and of the second timing pulse is equal to a half period of the input signal. The pulse width of the second timing pulse is equal to one period of the input signal. The rising edge of the first timing pulse is substantially coincident with the falling edge of the input signal, the rising edge of the second timing pulse is substantially coincident with the falling edge of the first timing pulse, and the rising edge of the third timing pulse is substantially coincident with the falling edge of the second timing pulse. A charging circuit charges a first capacitor to a predetermined voltage level in response to the first timing pulse. A discharge circuit discharges according to the constant current mode the first capacitor circuit in response to the second timing pulse. A first gate circuit transfers the charge present on the first capacitor circuit to a second capacitor circuit in response to the second timing pulse. A second gate circuit transfer the charge present on the first capacitor circuit to a third capacitor circuit in response to a reference pulse having a reference phase. The speed and phase of the rotary machine is selectively controlled in accordance with the voltages present on the second and third capacitor circuits.

Speed-and-phase control circuit for a rotary machine

The auxilliary signal path in a compander system includes, in series, a first amplifier 7, a weighting function amplifier 8, and a detection circuit 9. The output of the latter controls the gain of a voltage-controlled variable gain circuit 11 also connected to the first amplifier output, and the integrated output of the variable gain circuit is fed back to the input of the first amplifier via a subtraction circuit 13 also supplied with the auxilliary signal path input. Alternatively, the first amplifier may comprise an operational amplifier, in which case the integrated signal is directly coupled to one of its inputs.

Audio signal compression and expansion system

A brushless d.c. motor includes a plurality of Hall elements 1-3 for detecting the relative positions of the rotor and stator poles, a comparator circuit 103 responsive to a bipolar input control signal A for generating an output signal B proportional to the absolute magnitude of signal A and an output signal D as a function of the polarity of signal A, a timing signal generator 104 for generating output signals E timed in relation to the Hall element outputs F and having a phase sequence in response to signal D, and a reversible current supply circuit 105 for driving a set of Y-connected stator windings 101 with currents C having a magnitude proportional to signal B and a phase sequence in accordance with signal E.

Stator winding control circuit for a brushless d.c. motor

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Tokorozawa, Japan

Saburo Takaoka