Rigetti & Co, LLC

Sabrina Sae Byul Hong

Alexander Papageorge

Matthew J Reagor

Chad Tyler Rigetti

Eyob Alebachew Sete

Nikolas Anton Tezak

Marcus Palmer Da Silva

Shane Arthur Caldwell

Colm Andrew Ryan

Nicolas Didier

Deanna Margo Abrams

Prasahnt Sivarajah

Benjamin Jacob Bloom

Nasser Alidoust

Christopher Butler Osborn

Alexa Nitzan Staley

Anthony Polloreno

In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.

Parametrically activated quantum logic gates

In a general aspect, a method executed in a quantum computing system includes performing a calibration process in the quantum computing system to identify a value of a parameter of the quantum computing system. The method also includes analyzing a variation of the value in response to a change in a condition of the quantum computing system, thereby determining a stability of the parameter. The method additionally includes scheduling a recalibration of the parameter based on the stability of the parameter and executing a quantum algorithm in the quantum computing system based on the value of the parameter identified by the calibration process.

Maintaining calibration in a quantum computing system

In a general aspect, three-dimensional integrated multilayer architectures for qubit devices organized in quantum processors are described herein. In some aspects, a quantum processor includes devices residing in multiple physical layers. The quantum processor also includes connections that interconnect the devices in a tree structure topology. A computational state is encoded in child qubit devices in a first layer of the tree structure topology. A quantum control sequence is applied to at least one of the devices to transform the computational state. Applying the quantum control sequence includes using one or more parent qubit devices in a second layer of the tree structure topology to mediate between child qubit devices in the first layer of the tree structure topology. A readout of the transformed computational state may be performed.

Operating a quantum processor having a three-dimensional device topology

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Sabrina Sae Byul Hong