National Semiconductor Corporation

S Chen Sean

Don Roy Sauer

A voltage reference circuit is arranged in a CMOS process based technology to provide a configurable voltage reference. The voltage reference includes bipolar transistors that are implemented as parasitic devices in the CMOS process. Two of the bipolar transistors are configured to generate a &Dgr;Vbe signal in the voltage reference circuit. An error amplifier cooperates with the two bipolar transistors via a control signal such that the control signal is related to &Dgr;Vbe/R. A first current source is coupled to another bipolar device, which is parallel connected to a resistor divider. The output of the resistor divider provides a divided reference signal that is related to the Vbe of the other bipolar device. Another resistor is coupled between a second current source and the output of the resistor divider such that an adjustable/temperature compensated reference signal is provided.

Growing community of inventors

Sunnyvale, CA, United States of America

S Chen Sean