Napatech A/s

Mips Technologies, Inc.

Søren Kragh

Radhika Thekkath

Franz Treue

Vidya Rajagopalan

René Krog Josiassen

A system and a method of sampling an event signal using multiple clocking signals each provided in a separate candidate clock domain each of which also receives points in time from a master clock. From each candidate clock domain, clocked by the individual clocking signals, pairs of a received point in time and event signal value are fed to a master clock domain. In the master clock domain, the values of the event signal may be determined over time as a function of master clock time. This may be used for synchronizing operation in the master clock domain of e.g. packet time stamping with an overall time defined by the event signal. Using multiple clocking signals for the sampling, a much more precise sampling of the event signal is facilitated.

System and a method of deriving information

A method and apparatus adapted to prevent Head-Of-Line blocking by forwarding dummy packets to queues which have not received data for a predetermined period of time. This prevention of HOL may be on an input where data is forwarded to each of a number of FIFOs or an output where data is de-queued from FIFOs. The dummy packets may be provided with a time stamp derived from a recently queued or de-queued packet.

Apparatus and method for receiving and forwarding data

A system and method for program counter and data tracing in a multi-issue processor is disclosed. Instructions are traced in program sequence order. In one embodiment instructions are traced in graduation order from a reorder buffer. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core.

Growing community of inventors

Valby, Denmark

Søren Kragh