Stmicroelectronics S.a.

Sébastien Poirier

Richard P Fournel

Philippe Candelier

Cyrille Dray

Philippe Gendrier

Daniel Caspar

The semiconductor memory device includes an electrically erasable programmable non-volatile memory cell having a single layer of gate material and including a floating-gate transistor and a control gate. The source, drain and channel regions of the floating-gate transistor form the control gate. Moreover, the memory cell includes a dielectric zone lying between a first part of the layer of gate material and a first semiconductor active zone electrically isolated from a second active zone incorporating the control gate. This dielectric zone then forms a tunnel zone for transferring, during erasure of the cell, the charges stored in the floating gate to the first active zone.

Electrically erasable and programmable, non-volatile semiconductor memory device having a single layer of gate material, and corresponding memory plane

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Vizille, France

Sébastien Poirier