Infineon Technologies Ag

Rüdiger Lorenz

Frank Gersemsky

Christian Kranz

Bernd Schmandt

Elmar Wagner

Markus Hammes

André Neubauer

Ulrich Boetzel

Michael Warmers

A transmitting and receiving arrangement as well as a method for transmission of monitoring and/or payload data in a transmitting and receiving arrangement for a wirefree communications system has a device which processes baseband for processing digital signals to form a baseband signal and a device which processes radio frequency for conversion of the baseband signal to a radio frequency signal. Monitoring and/or payload data are/is transmitted in the form of data packets via at least one channel of a channel-oriented link between the device which processes baseband and the device which processes radio frequency.

Transmitting and receiving arrangement with a channel-oriented link

A transmitting/receiving unit for asynchronous data transmission has a CRC unit and a transmission FIFO in a transmission path. A coding unit for SLIP-coding of data to be transmitted can optionally be connected in the transmission path. Furthermore, a CRC unit and a reception FIFO are arranged in the reception path of the module. A decoding unit for SLIP-decoding of received data can optionally be connected in the reception path. The unit is connected to a data bus, in which case a DMA unit can also be connected to the data bus.

Serial asynchronous interface with slip coding/decoding and CRC checking in the transmission and reception paths

A system for production and/or processing of data bursts has at least two series-connected modules, with data (Data) and information (Enable) relating to the validity of the data (Data) being transmitted from a first module (A) to an adjacent second module (B), and information (Read) relating to the reception of valid data being transmitted from the second module (B) to the first module (A).

Interface for data transmission

In a method for avoiding transients during switching processes in integrated circuits, a module of the integrated circuit is switched from a first operating state to a second operating state, a load change occurring thereby. In this case, it is ensured that the occurring quotient of load change and time duration for the transition from the first operating state to the second operating state does not exceed a predetermined limit value, thereby reducing or avoiding transients associated with such switching.

Growing community of inventors

Dinslaken, Germany

Rüdiger Lorenz