Fuji Electric Co., Ltd.

Fuji Electric Device Technology Co., Ltd.

Ryuu Saitou

Naoki Kumagai

Yoshihiro Ikura

Hiroshi Kanemaru

Tatsuya Naito

Shigemi Miyazawa

Morio Iwamizu

Kenichi Ishii

Yuuichi Harada

Takatoshi Ooe

Yuiichi Harada

A temperature sensor circuit is provided that facilitates preventing a too-high overshooting voltage from occurring at an output terminal when a power supply is connected to the temperature sensor circuit. The temperature sensor circuit includes a short-circuiting device, disposed in parallel to depletion mode NMOS, that short-circuits the drain and source of depletion mode NMOS when a power supply is connected; and delay device that transmits a signal for short-circuiting the drain and source of depletion mode NMOS for a certain period from the time point of power supply connection to short-circuiting device for preventing the voltage at output terminal of temperature sensor circuit from overshooting.

Temperature sensor circuit

A coil failure detection circuit detects a rise of a collector current of an IGBT and a timer circuit measures the length of a rise period. If the rise is not a normal one, an electronic control unit judges that a coil failure has occurred. The electronic control unit turns off the IGBT to prevent misfires and stops a flow of fuel gas to a combustion chamber to prevent melting or deterioration of a catalyst.

Igniter system

To prevent the destruction of a semiconductor element due to negative resistance, and to reduce the dynamic resistance of a static electricity prevention diode, the ratio of the maximum electric field intensity during an avalanche and the average electric field in a strong electric field region, as well as the impurity density gradient in the vicinity of the strong electric field region are optimized. During avalanche breakdown, a depletion layer is formed across the entire high resistivity region, and its average electric field is kept to &#xbd; or more of the maximum electric field intensity. The density gradients (the depths and impurity densities) of a pregion and of an nregion that form a p-n junction of the diode are controlled so that the density gradient in the neighborhood of the high resistivity region does not have negative resistance with respect to increase of the avalanche current.

Surge voltage protection diode with controlled p-n junction density gradients

A lateral MOSFET and a method of forming thereof includes a p-type semiconductor substrate, a first n-type well in the surface portion of the semiconductor substrate, an n-type drain region in the first n-type well, a p-type well in the first n-type well, an n-type source region in the p-type well, a gate oxide film on the portion of the p-type well between the n-type source region and the first n-type well, a gate electrode on the gate oxide film, and a second n-type well containing the p-type well therein to increase the n-type impurity concentration in the vicinity of the junction between the p-type well and the first n-type well beneath the gate and to increase the impurity amount and the thickness of the n-type semiconductor region beneath the p-type well. The first and second n-type wells can be overlapping or formed continuous or contiguous with each other. The lateral MOSFET exhibits a high punch-through breakdown voltage suitable for a high-side switch.

Semiconductor device and method of manufacturing the same

Growing community of inventors

Nagano, Japan

Ryuu Saitou