Rohm Co., Ltd.

Ryuta Watanabe

Kenji Hayashi

Takukazu Otsuka

Katsuhiko Yoshihara

Makoto Ikenaga

Masaaki Matsuo

Maiko Hatano

Seita Iwahashi

Akihiro Suzaki

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a mounting layer, switching elements, a moisture-resistant layer and a sealing resin. The substrate has a front surface facing in a thickness direction. The mounting layer is electrically conductive and disposed on the front surface. Each switching element includes an element front surface facing in the same direction in which the front surface faces along the thickness direction, a back surface facing in the opposite direction of the element front surface, and a side surface connected to the element front surface and the back surface. The switching elements are electrically bonded to the mounting layer with their back surfaces facing the front surface. The moisture-resistant layer covers at least one side surface. The sealing resin covers the switching elements and the moisture-resistant layer. The moisture-resistant layer is held in contact with the mounting layer and the side surface so as to be spanned between the mounting layer and the side surface in the thickness direction.

Semiconductor device

The power semiconductor apparatus includes: a semiconductor device; a bonding layer on chipdisposed on an upper surface of the semiconductor device; and a metal leaddisposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal leadhas a three-laminated structure including: a second metal layerhaving a CTE equal to or less than 5×10/° C., for example; and a first metal layerand a third metal layersandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

Power semiconductor apparatus and fabrication method for the same

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, amounting layer, switching elements, a moisture-resistant layer and a sealing resin. The substrate has a front surface facing in a thickness direction. The mounting layer is electrically conductive and disposed on the front surface. Each switching element includes an element front surface facing in the same direction in which the front surface faces along the thickness direction, a back surface facing in the opposite direction of the element front surface, and a side surface connected to the element front surface and the back surface. The switching elements are electrically bonded to the mounting layer with their back surfaces facing the front surface. The moisture-resistant layer covers at least one side surface. The sealing resin covers the switching elements and the moisture-resistant layer. The moisture-resistant layer is held in contact with the mounting layer and the side surface so as to be spanned between the mounting layer and the side surface in the thickness direction.

The power semiconductor apparatus includes: a semiconductor device; a bonding layer on chipdisposed on an upper surface of the semiconductor device; and a metal leaddisposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal leadhas a three-laminated structure including: a second metal layerhaving a CTE equal to or less than 5&#xd7;10/&#xb0; C., for example; and a first metal layerand a third metal layersandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

Growing community of inventors

Kyoto, Japan

Ryuta Watanabe