Fujitsu Corporation

Fujitsu Semiconductor Limited

Ryuji Nomoto

Yoshiyuki Yoneda

Kazuto Tsuji

Junichi Kasai

Hideharu Sakoda

Masanori Onodera

Seiichi Orimo

Mitsutaka Sato

Toshimi Kawahara

Yoshitaka Aiba

Toshiyuki Motooka

Eiji Watanabe

Tetsuya Fujisawa

Masaki Waki

Kaname Ozawa

Kenji Itasaka

Terumi Kamifukumoto

Hiroshi Inoue

Yasunori Fujimoto

Hirohisa Matsuki

Toshio Hamano

Yoshihiro Kubota

Kazuyuki Imamura

Masaaki Seki

Yoshitsugu Katoh

Takashi Hozumi

Mitsuo Abe

Yuji Akashi

Shinya Nakaseko

Mamoru Suwa

Michio Hayakawa

Katsuro Hiraiwa

Hayato Okuda

Noriaki Shiba

Syuichi Monma

Koichi Nakamura

Disclosed is a semiconductor device including first and second semiconductor elements, first and second external connection terminals and a sealing member. The first external connection terminal is provided at a first surface of the first semiconductor element. The second semiconductor element is provided at a second surface side, that is at a side opposite to the first surface, of the first semiconductor element. The second external connection terminal is connected to the second semiconductor element, and the second external connection terminal is configured to be, together with the first external connection terminal, connected to a wiring board. The sealing member seals the first and second semiconductor elements and exposes a portion, that is configured to be connected to the wiring board, of the first external connection terminal and a portion, that is configured to be connected to the wiring board, of the second external connection terminal.

Encapsulated semiconductor chips with wiring including controlling chip and method of making the same

A semiconductor device, including a semiconductor substrate where a plurality of functional elements is formed; and a multilayer interconnection layer provided over the semiconductor substrate, the multilayer interconnection layer including a wiring layer mutually connecting the plural functional elements and including an interlayer insulation layer, wherein a region where the wiring layer is formed is surrounded by a groove forming part, the groove forming part piercing the multilayer interconnection layer; and the groove forming part is filled with an organic insulation material.

Semiconductor device, manufacturing method of the semiconductor device, and mounting method of the semiconductor device

A semiconductor device comprises a semiconductor chip, a wiring layer formed on the semiconductor chip, a column electrode connected at a first end to the wiring layer, and an encapsulation resin formed on the semiconductor chip. In the semiconductor device, the column electrode is provided with a second end, opposite to the first end, projecting from the encapsulation resin, and an external connection member is connected to the column electrode at the second end so that the external connection member is separate from a surface of the encapsulation resin.

Semiconductor device and method of manufacturing the semiconductor device

A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.

Method of designing circuit board

A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.

Device having resin package and method of producing the same

A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.

Semiconductor device, method for fabricating the semiconductor device, lead frame and method for producing the lead frame

A wire bonding method includes a first bonding process for forming a first ball-shaped part in a wire and bonding the first ball-shaped part to a first connected member; a ball-shaped part forming process for guiding the wire away from a position where the wire is bonded to an inner lead so as to form a predetermined loop, and a second bonding process for forming a second ball-shaped part in a predetermined position in the wire; and a second bonding process for bonding the second ball-shaped part to a semiconductor element pad that serves as a second connected member.

Wire bonded device with ball-shaped bonds

A semiconductor device including a semiconductor chip sealed with an encapsulating resin. Columnar electrodes are connected to electrode pads of the semiconductor chip, and extend through the encapsulating resin. The columnar electrodes are made from bonding wires and include enlarged outer ends. Solder balls are arranged on the surface of the encapsulating resin and connected to the outer ends of the columnar electrodes. In another example, pin wires are formed by half-cutting bonding wires, bonding one end of each of the bonding wires, and cutting the bonding wires at the half-cut portions.

Semiconductor device having columnar electrode and method of manufacturing same

A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts.

A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding from a mounting surface of the resin package, metallic film parts provided to the resin projections, connecting members electrically connecting electrode pads on the semiconductor element and the metallic film parts, and connection pads extending from the metallic film parts, the connecting members being connected to the connection pads.

Semiconductor device and mounting structure

A semiconductor device and a method of producing the semiconductor device are provided. This semiconductor device includes a semiconductor chip, a printed wiring board, a heat spreader, a sealing resin, and solder balls. The printed wiring board is provided with the solder balls on an outer portion and a wiring layer on an inner portion. Wires are bonded to the wiring layer, and an opening is formed in the center of the printed wiring board. The heat spreader is bonded to the printed wiring board, with the semiconductor chip being thermally connected to the stage portion of the heat spreader. The sealing resin is made up of a first sealing resin portion and a second sealing resin portion. The first and second sealing resin portions sandwich the heat spreader.

Semiconductor device and method of producing the same

This invention relates to a semiconductor device in which a plurality of outer terminals are arranged in a lattice formation on a flat surface. The semiconductor device has a semiconductor chip, a lead member having a lead portion and an outer connecting terminal connected integrally to the lead portion, the lead portion electrically connected to the semiconductor chip, the lead portion extending outwardly from the semiconductor chip, the outer connecting terminal extending downwardly from the lead portion, a sealing resin sealing the semiconductor chip and the lead portion, a bottom face of the semiconductor chip and a bottom face of the lead portion being exposed from the sealing resin, and an insulating member covering the bottom face of the semiconductor chip and the bottom face of the lead portion. Also, the semiconductor device has a semiconductor chip having a predetermined number of electrode pads, a predetermined number of leads electrically connected to the electrode pads, each of the leads having a projecting terminal portion formed by bending the lead, and a resin portion sealing the semiconductor chip and the leads, wherein the terminal portions are exposed from one face of the resin portion.

Semiconductor device having a lead portion with outer connecting terminals

A semiconductor device includes the first through third semiconductor devices which are stacked on a substrate and the first through third wires for connecting the semiconductor elements and the substrate. The first wires serve to connect electrodes of the first semiconductor element positioned uppermost and electrodes of the second semiconductor element. The second wires serve to connect the electrodes of the second semiconductor element and electrodes of the third semiconductor element. The third wires serve to connect the electrodes of the third semiconductor element and bonding pads of the substrate. Between the first wires and the electrodes of the second semiconductor element and between the second wires and the electrodes of the third semiconductor element, stud bumps are provided so as to form space therebetween, thereby avoiding short-circuits therebetween.

Growing community of inventors

Kawasaki, Japan

Ryuji Nomoto