Nec Corporation

Hitachi, Ltd.

Fujitsu Corporation

Nippon Telegraph and Telephone Corporation

Ryuichi Ikematsu

Akio Tajima

Hitoshi Takeshita

Hiromi Ueda

Yoshihiro Ashi

Yukio Nakano

Tomoyuki Hino

Motoo Nishihara

Shinsuke Fujisawa

Kazuo Takagi

Satoshi Kamiya

Takafumi Chujo

Hiroyuki Takagi

Shigeo Amemiya

Zhenlong Cui

Takatoshi Kurano

Akihiro Miyamoto

Haruhiko Matsunaga

Kenji Akutsu

It is difficult to improve the wavelength-band utilization rate of an optical network as a whole while operating the optical network stably; and therefore, an optical network controller according to an exemplary aspect of the present invention includes optical wavelength region setting means for setting a wavelength region in an optical transmission line between a plurality of optical nodes composing an optical network using wavelength division multiplexing system dividing the wavelength region into consecutive regions of a first wavelength region and a second wavelength region; optical path setting means for setting a first optical path in the first wavelength region and a second optical path in the second wavelength region, the second optical path differing from the first optical path in a route; and control unit for instructing the plurality of optical nodes on a central wavelength and a usable band of signal light for the optical node to transmit based on a setting by the optical path setting means.

Optical network controller and optical network control method

It is difficult to increase the number of inputs and outputs of an optical switch supporting CDC functions, therefore, an optical switch according to an exemplary aspect of the present invention includes a unit optical switch inputting n optical signals and outputting n optical signals; an optical splitter inputting a single optical signal, splitting the single optical signal into k optical signals, and outputting the k optical signals; and an optical selector inputting m optical signals and outputting a single optical signal, wherein the optical splitter includes m&#xd7;n pieces, the unit optical switch includes m&#xd7;k pieces, the optical selector includes n&#xd7;k pieces, (k&#xd7;(m&#xd7;n)) outputs of the optical splitter correspond to (n&#xd7;(m&#xd7;k)) inputs of the unit optical switch, (n&#xd7;(m&#xd7;k)) outputs of the unit optical switch correspond to (m&#xd7;(n&#xd7;k)) inputs of the optical selector, and (n&#xd7;m) optical signals inputted into the optical splitter are output through the (m&#xd7;k) unit optical switch from the optical selector as (n&#xd7;k) optical signals.

Optical switch, optical transmission device, and optical switching method

An exemplary object of the present invention lies in a point of providing a technology capable of measuring a transmission quality of an Ethernet network in order to utilize Ethernet as carrier-grade communication. The present invention includes an error bit number measurer for measuring the number of error bits that have occurred for a frame of Ethernet, being a target of monitoring, within a monitoring period, a transmitted bit number measurer for measuring the number of total transmitted bits of Ethernet frames that a device facing it has transmitted within the foregoing monitoring period, and a bit error rate operator for obtaining a bit error rate of a transmission path by employing a measurement result by the foregoing error bit number measurer and the foregoing transmitted bit number measurer.

Quality measuring system, quality measuring apparatus, quality measuring method, and program

To allow performance monitoring of the end-to-end path from the Ingress node to the Egress node of the GFP network by an FCS (Frame Check Sequence) check in a GFP (Generic Frame Procedure) frame, the FCS generation target area is set in the payload field of the GFP frame, no FCS recalculation is performed at the relay node and the GFP frame is transferred to the next node with the FCS added when the GFP frame is received even if an error is detected by the FCS check.

Apparatus and method for GFP frame transfer

In a multi-mode scheduler including a N&#xd7;kM scheduler for adjusting data transmission between N-pieces of input interface sections and kM-pieces of output interface sections, the multi-mode scheduler, k-pieces of N&#xd7;M schedulers to be the N&#xd7;kM scheduler, and (k&#x2212;1)-pieces of selection circuits for switching allocated output port information input from an outside of the N&#xd7;kM scheduler and information from a N&#xd7;M scheduler at front step, so as to be input to the N&#xd7;M scheduler as allocated output port information, and two operations are set freely with a switching operation of the selection circuits. As a result, it is possible to provide a general scheduler.

Multi-mode scheduler, apparatus including multi-mode scheduler and multi-mode scheduling method

Provided is a mode of alarm transfer for use in a system for transmitting an encapsulated Ethernet signal between an Ethernet termination device ( ) connected to a terminal ( ) and an Ethernet termination device ( ) connected to a terminal ( ) being disposed opposite to each other. The Ethernet termination device ( ) detects notification form the Ethernet termination device ( ) regarding a link down between the terminal ( ) and the Ethernet termination device ( ), or detects occurrence of a failure on a transmission path between the Ethernet termination device ( ) and the Ethernet termination device ( ). When a link between the terminal ( ) and the Ethernet termination device ( ) is disconnected forcibly based on the detection, notification to the Ethernet termination device ( ) regarding the link down between the terminal ( ) and the Ethernet termination device ( ) is withheld.

Network termination device, alarm transfer system and alarm transferring method

In a scheduler having m input interfaces and n output interfaces in an ATM switching apparatus, each of m and n is an integer equal to or more than 2. The scheduler is includes a storage unit, first and second rearranging unit, a control unit and a searching unit. The storage unit stores a plurality of shuffle patterns including first to fourth shuffle patterns. The first rearranging unit carries out a first shuffling operation in units of k data (k is an integer equal to or more than 2 and less than or equal to s which is one of n and m, the other being t) and a second shuffling operation in units of u groups (u is an integer equal to or more than 2 and corresponding to s/k) to (m&times;n) data supplied from the m input interfaces based on the first and second shuffle patterns to produce first rearranged data. The (m&times;n) data are grouped into (t&times;u) groups. The second rearranging unit carries out a third shuffling operation in units of p data (p is an integer equal to or more than 2 and less than or equal to (m&times;n)) and a fourth shuffling operation in units of groups to the first rearranged data based on the third and fourth shuffle patterns to produce second rearranged data. The first rearranged data are grouped into v groups (v is an integer equal to or more than 2 and corresponding to (m&times;n)/p).

Scheduler using small sized shuffle pattern in ATM network

A hitless switching system in an asynchronous transfer mode (ATM) apparatus, includes a first system switch section and a second system switch section. The first system switch section has a first cell buffer, and sequentially stores a sequence of cells in the first cell buffer to sequentially output the stored cells from the first cell buffer while performing a discard priority control to the sequence of cells. Also, the first system switch section stops the discard priority control when a switching control cell is detected in the sequence of cells. The second system switch section has a second cell buffer, and sequentially stores the input cells in the second cell buffer to sequentially output the stored cells from the second cell buffer while performing the discard priority control to the sequence of cells. When the switching control cell is detected in the input cell, the second system switch section stops the discard priority control and discards the stored cells from the second cell buffer together with the switching control cell.

Hitless switching system of ATM switch apparatus in which discard priority control is stopped

A switching control cell is inserted into an input cell in a switching control cell generator. In a period between the detection of a switching control cell in a first or second switching control cell detector and the detection of the switching control cell in a third switching control cell detector, in active and stand-by switches, when a cell is discarded in any one of the active and stand-by switches, in addition to priority discard control, the same cell is discarded in the other switch independently of the priority discard control. Further, upon detection of a switching control cell in the switching control cell detector, all the cells accumulated within the cell buffer are discarded, and until the detection of the switching control cell in the switching control cell detector, reading from the cell buffer is stopped so that the same cell is written into the cell buffer in the active switch and the cell buffer in the stand-by switch. By virtue of the above constitution, a switching system for an asynchronous transfer mode switch supporting a plurality of discard priority classes can be provided which realizes hitless switching.

Switching system for asynchronous transfer mode switch

In a test method and apparatus for testing a virtual path in an asynchronous transfer mode system, a sequence number is included in an operation administrating monitoring (OAM) cell to specify the OAM cell for testing a virtual path between transmission and reception sides. The sequence number is inserted into the OAM cell by the use of an idle cell and is received by a sequence number test circuit included in the reception side. The sequence number in the OAM is collated with a result of counting the OAM cell in the reception side to detect coincidence or non-coincidence between the sequence number and the result of counting. On detecting the non-coincidence, a loss of the OAM cell or wrong reception of the OAM cell is detected on the reception side. Otherwise normal operation is confirmed between the transmission and the reception sides.

Test method and apparatus capable of testing reception of a desired cell

In an ATM switching network, ATM (asynchronous transfer mode) self-routing switches are interconnected by facilities carrying STM-N (synchronous transport modules level N) signals. At each inlet of an ATM self-routing switch, an STM overhead is removed from each frame of an incoming STM-N signal to create a vacant interval and the frame is converted according to ATM cell format into a series of data ATM cells, and an idle ATM cell is derived from the vacant interval. A supervisory bit sequence is inserted to the payload field of the idle ATM cell to produce a supervisory ATM cell, and the data and supervisory ATM cells are sent into the ATM switch. At each outlet of the switch, the bit sequence of the supervisory ATM cell is checked to evaluate the quality of the ATM switch and a series of data ATM cells is then converted into an STM-N signal according to STM-N frame format.

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Tokyo, Japan

Ryuichi Ikematsu