Globalfoundries Inc.

Advanced Micro Devices Corporation

Ryoung-han Kim

Thomas Ingolf Wallow

Harry Jay Levinson

Jongwook Kye

Uzodinma Okoroanyanwu

Yunfei Deng

Obert Reeves Wood, Ii

Jong-wook Kye

Bruno M LaFontaine

Bruno M La Fontaine

Alden R Acheta

A method for forming a semiconductor device is provided including processing a wafer having a target material, forming a multilevel photoresist structure having a protection layer over the target material, and forming a multilevel recess in the target material with the multilevel photoresist structure.

Method of forming semiconductor device with multiple level patterning

An optical polarizer positioned before a light source for use in semiconductor wafer lithography including an array of aligned nanotubes. The array of aligned nanotubes cause light emitted from the light source and incident on the array of aligned nanotubes to be converted into polarized light for use in the semiconductor wafer lithography. The amount of polarization can be controlled by a voltage source coupled to the array of aligned nanotubes. Chromogenic material of a light filtering layer can vary the wavelength of the polarized light transmitted through the array of aligned nanotubes.

Optical polarizer with nanotube array

Ultrafine dimensions are accurately and efficiently formed in a target layer using a spacer lithographic technique comprising forming a first mask pattern, forming a cross-linkable layer over the first mask pattern, forming a cross-linked spacer between the first mask pattern and cross-linkable layer, removing the cross-linkable layer, cross-linked spacer from the upper surface of the first mask pattern and the first mask pattern to form a second mask pattern comprising remaining portions of the cross-linked spacer, and etching using the second mask pattern to form an ultrafine pattern in the underlying target layer. Embodiments include forming the first mask pattern from a photoresist material capable of generating an acid, depositing a cross-linkable material comprising a material capable of undergoing a cross-linking reaction in the presence of an acid, and removing portions of the non-cross-linked layer and cross-linked spacer from the upper surface of the first mask pattern before removing the remaining portions of the first mask pattern and remaining noncross-linked layer.

Spacer lithography

In one disclosed embodiment, a method for forming a high resolution resist pattern on a semiconductor wafer involves forming a layer of resist comprising, for example a polymer matrix and a catalytic species, over a material layer formed over a semiconductor wafer; exposing the layer of resist to patterned radiation; and applying a magnetic field to the semiconductor wafer during a post exposure bake process. In one embodiment, the patterned radiation is provided by an extreme ultraviolet (EUV) light source. In other embodiments, the source of patterned radiation can be an electron beam, or ion beam, for example. In one embodiment, the polymer matrix is an organic polymer matrix such as, for example, styrene, acrylate, or methacrylate. In one embodiment, the catalytic species can be, for example, an acid, a base, or an oxidizing agent.

Method for forming a high resolution resist pattern on a semiconductor wafer

Ultrafine patterns with dimensions smaller than the chemical and optical limits of lithography are formed by superimposing two photoresist patterns using a double exposure technique. Embodiments include forming a first resist pattern over a target layer to be patterned, forming a protective cover layer over the first resist pattern, forming a second resist pattern on the cover layer superimposed over the first resist pattern while the cover layer protects the first resist pattern, selectively etching the cover layer with high selectivity with respect to the first and second resist patterns leaving an ultrafine target pattern defined by the first and second resist patterns, and etching the underlying target layer using the superimposed first and second resist patterns as a mask.

Double exposure technology using high etching selectivity

A method for forming a semiconductor device is provided including processing a wafer having a target material; forming a first pattern over the target material; forming a protection layer over the first pattern; and forming a second pattern, over the target material and not over the protection layer, without an etching step between the forming the first pattern and the forming the second pattern.

Method of forming semiconductor device

Focus monitoring for a photolithographic applications is provided by illuminating a photoresist layer with a light beam transmitted through a first binary mask to define a circuit pattern on an underlying substrate and then illuminating the photoresist layer with an unbalanced off-axis light beam transmitted through a second binary mask. The second mask contains a shifting feature configuration in one portion, while another portion blocks light transmission to the chip design area of the photoresist. After development of the photoresist layer, the pattern formed by illumination of the second mask can be compared with a predefined reference feature on the photoresist layer to determine whether a shift, if any, is within acceptable focus limits.

In-die focus monitoring with binary mask

An integrated circuit fabrication process as described herein employs a photoresist stabilization step where patterned photoresist material is exposed to radiation having a wavelength that promotes cross-linking in the shallow surfaces of the patterned photoresist features. The patterned photoresist material is highly absorptive of the stabilizing radiation, which results in the surface cross-linking and modification of the outer surfaces of the patterned photoresist material. This modified 'shell' is immune to photoresist developer, photoresist solvents, intense ion implantation, and intense etchants. The shell also enables for the resist not to deform when baked at a temperature above its glass transition temperature. For example, the photoresist stabilization technique can be used in a double exposure process such that a patterned photoresist layer remains intact during a subsequent lithographic sub-process.

Stabilization of deep ultraviolet photoresist

Accurate ultrafine patterns are formed using a multiple exposure technique comprising implementing an OPC procedure to form an exposure reticle to compensate for distortion of an overlying resist pattern caused by an underlying resist pattern. Embodiments include forming a first resist pattern in a first resist layer over a target layer using a first exposure reticle, forming a second exposure reticle by an OPC technique to compensate for distortion of a second resist pattern caused by the underlying first resist pattern, depositing a second resist layer on the first resist pattern, forming the second resist pattern in the second resist layer using the second exposure reticle, the first and second resist patterns constituting a final resist mask, and forming a pattern in the target layer using the final resist mask.

Multiple exposure technique using OPC to correct distortion

According to one exemplary embodiment, an extreme ultraviolet (EUV) pellicle for use with a lithographic mask comprises a carbon nanotube film. The carbon nanotube EUV pellicle can be mounted on the lithographic mask. The carbon nanotube EUV pellicle protects the lithographic mask from contamination by undesirable particles and also prevents the undesirable particles from forming a focused image on the surface of a semiconductor wafer during fabrication; while advantageously, the carbon nanotube pellicle has a high level of EUV light transmittance.

EUV pellicle and method for fabricating semiconductor dies using same

According to one exemplary embodiment, an extreme ultraviolet (EUV) pellicle for protecting a lithographic mask includes an aerogel film. The pellicle further includes a frame for mounting the aerogel film over the lithographic mask. The aerogel film causes the pellicle to have increased EUV light transmittance.

EUV pellicle with increased EUV light transmittance

Ultrafine dimensions, smaller than conventional lithographic capabilities, are formed employing an efficient inverse spacer technique comprising selectively removing spacers. Embodiments include forming a first mask pattern over a target layer, forming a spacer layer on the upper and side surfaces of the first mask pattern leaving intermediate spaces, depositing a material in the intermediate spacers leaving the spacer layer exposed, selectively removing the spacer layer to form a second mask pattern having openings exposing the target layer, and etching the target layer through the second mask pattern.

Inverse self-aligned spacer lithography

According to one exemplary embodiment, an extreme ultraviolet (EUV) source collector module for use in a lithographic tool comprises an EUV debris mitigation filter. The EUV debris mitigation filter can be in the form of an aerogel film, and can be used in combination with an EUV debris mitigation module comprising a combination of conventional debris mitigation techniques. The EUV debris mitigation filter protects collector optics from contamination by undesirable debris produced during EUV light emission, while advantageously providing a high level of EUV light transmittance. One disclosed embodiment comprises implementation of an EUV debris mitigation filter in an EUV source collector module utilizing a discharge-produced plasma (DPP) light source. One disclosed embodiment comprises implementation of an EUV debris mitigation filter in an EUV source collector module utilizing a laser-produced plasma (LPP) light source.

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San Jose, CA, United States of America

Ryoung-han Kim