Kabushiki Kaisha Toshiba

Ryota Terauchi

Shinsuke Fujii

Takuma Aoyama

Yusuke Tsurui

According to one embodiment, a first impedance adjustment circuit of a driver circuit includes a first resistor having an end connected to a first signal node. The first impedance adjustment circuit includes a first MOS transistor having an end connected to the other end of the first resistor. The first impedance adjustment circuit includes a second resistor having an end connected to the first signal node. The first impedance adjustment circuit includes a second MOS transistor having an end connected to the other end of the second resistor. The first impedance adjustment circuit includes a third resistor having an end connected to the other end of the first MOS transistor and the other end of the second MOS transistor, and the other end connected to the first output pad.

Driver circuit and impedance adjustment circuit

The input circuit includes a first switch control circuit that controls a first switch and a second switch. The first switch control circuit turns off the first switch and the second switch in a first period during which a first input signal and a second input signal are DC signals. The first switch control circuit turns on the first switch and the second switch in a second period during which the first input signal and the second input signal are AC signals.

Input circuit

In a differential signal test mode, the first control circuit causes, in response to the first control signal, the differential signal generating circuit to generate the differential signal depending upon the data signal and output the differential signal. The second control circuit stops the operation of the common mode signal generating circuit in response to the second control signal. In a common mode signal test mode, the first control circuit causes, in response to the first control signal, the differential signal generating circuit to generate a fixed differential signal and output the differential signal. The second control circuit causes, in response to the second control signal, the common mode signal generating circuit to generate the common mode signal depending upon the clock signal and output the common mode signal.

Differential signal output device, test method of differential signal output device, and tester

A differential signal output device includes a first transmitting terminal and a second transmitting terminal that superimpose a differential signal and a common mode signal and output the superimposed signals. The differential signal output device includes a differential signal generating circuit that generates the differential signal in response to a data signal and outputs the differential signal to the first transmitting terminal and the second transmitting terminal. The differential signal output device includes a common mode signal generating circuit that generates the common mode signal in response to a clock signal, outputs the common mode signal to the first transmitting terminal and the second transmitting terminal, and controls a slew rate of the common mode signal in response to a control signal.

Differential signal output device and portable device

An electronic device has a manipulation part which outputs a control signal including a first analog signal and a second analog signal obtained by inverting a phase of the first analog signal; and a display part which includes a semiconductor integrated circuit supplied at an input terminal thereof with the control signal to output a signal depending upon the control signal from an output terminal thereof, and which displays a predetermined image based on the signal output from the semiconductor integrated circuit.

Semiconductor integrated circuit and electronic device

A semiconductor integrated circuit for receiving a signal having been propagated through a transmission line, has a control circuit that controls on/off of a first to fourth switching circuits, wherein the control circuit turns off the first switching circuit and the second switching circuit and turns on the third switching circuit and the fourth switching circuit in a test operation mode for measuring a resistance value of the terminator resistor, and the control circuit turns on the first switching circuit and the second switching circuit and turns off the third switching circuit and the fourth switching circuit in a normal operation mode for a normal operation.

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Yokohama, Japan

Ryota Terauchi