Hitachi, Ltd.

Ryosei Kawai

Kan Yasui

Shigeo Moriyama

Soichi Katagiri

Sadayuki Nishimura

Yoshihiro Ishida

Takashi Kugaya

Shigeo Ootsuki

The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended. Further, the present sizing-dressing is carried out jointly with processing of a wafer to thereby enable improvement of throughput of the apparatus as well as maintenance of a processing rate. The present apparatus and method are effective for planarization of various substrate surfaces having irregularities.

Polishing apparatus and method for producing semiconductors using the apparatus

Growing community of inventors

Kodaira, Japan

Ryosei Kawai