Nippon Electric Co., Ltd.

Kokusai Denshin Denwa Co., Ltd.

Ryokichi Saga

Yukio Takimoto

Keiichiro Koga

Yutaka Yasuda

A switching matrix enables the impedance to be easily matched at the connecting points of the distributing, the switching and the combining circuits, and of the external circuits. The switching circuit used by the switch matrix, includes PIN diodes, Schottky barrier diodes, field-effect-transistors (FETS), coaxial relays, or mixers. These devices can gain the ON/OFF ratio required for the switching circuit. However, in an M.times.N switch matrix, the input impedance of the switch circuit is usually dependent on the number of inputs or outputs to be selected, and therefore, there are deviations in the ON/OFF ratio required for the switch operations and a resulting deterioration in the signal-to-noise ratio. The present invention provides a switch matrix which is flexible enough to allow easy changes of the number of input/output terminals, with only a small insertion loss, even with a great number of input/output terminals. The switch matrix has a greater ON/OFF ratio, by cascade-connecting the switch circuits in multiple stages, with a smaller output level of deviation which is caused by the routing differences for signals. The switch matrix has a high switching speed, small size, light weight, and low power consumption.

Switch matrix apparatus for satellite-switched TDMA system or the like

The invention converts between a cyclic and a general code sequence, each sequence having a succession of normal code blocks and an additional or shorter code block. A zero bit series is hypothetically assumed before the additional code block. In an encoder for producing a cyclic code sequence, the zero bit series is placed before the additional code block by cooperation of a timing control circuit and a divider. In a decoder, a counter times an additional cyclic code block and starts counting while another counter is still counting to time a period, which is the period next preceding a normal cyclic code block, whereby the zero bit series is assumed.

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Tokyo, Japan

Ryokichi Saga