Fujitsu Corporation

Ryoji Shimozono

Yasuo Tanaka

Kenji Tsutsumi

Yasunori Ogawa

Takashi Nara

Takashi Hatano

Yutaka Kawato

Sumie Okada

Kunio Yamamoto

Yoshihiro Shimizu

Hiroshi Adachi

Noboru Ise

Shigeo Sano

Hiroyuki Kudoh

Aya Takagi

An ISDN switching system having facilities for testing an ISDN signal composed of B-channels and D-channels at least. The testing facilities can achieve a B-channel test and D-channel test selectively with simple construction by employing a converting unit in the system. The converting unit enables creation of a connection path between a test equipment and an object to be tested through an ISDN exchange and thus the ISDN signals for the test can be treated as usual ISDN signals. Thereby, the test equipment and the object can freely be connected to each other.

ISDN switching system having testing facilities

A digital subscriber line formed by terminal equipment, a network control device including a plurality of the terminal equipment, and an exchange terminal. In a waiting state of the digital subscriber line, the network control device is placed in a state which can only receive a signal. A sending portion of the network control device is driven when, at a call from the terminal equipment, the terminal control device receives a line activation signal from the exchange equipment and when, at an incoming state from the state from the exchange terminal, the terminal control device receives a line activation from the exchange equipment. The synchronization pattern signal is sent from the sending portion to the exchange terminal so that the synchronization of the exchange terminal is established.

System for controlling network activation sequence

A digital network system having an arrangement for testing a digital subscriber line includes a switching device, an exchange terminal device as a subscriber circuit connected with the switching device, a subscriber line connected with the exchange terminal device, a network terminal device at a subscriber's side connected between the subscriber line and terminal equipment devices. The network terminal device includes a turn-around portion for forming a turn-around loop through which the turning-around of a signal to the subscriber line connected with the network termination device is carried out, and a discrimination portion for detecting that data transmission can be carried out and cancelling the formation of the turn-around loop. The turn-around loop is formed when a frame synchronization bit signal from the exchange terminal device is received by the network terminal device and cancelled when the discrimination portion detects that data transmission can be carried out. Communication for either a monitoring of transmission or a bit error testing can be carried out between the network terminal device and the switching device while the turn-around loop is formed, and data transmission between the exchange terminal device and the terminal equipment devices can be carried out after the turn-around loop is cancelled.

Digital network system having arrangement for testing digital subscriber

A digital subscriber line formed by terminal equipment, a network control device including a plurality of the terminal equipment, and an exchange terminal. In a waiting state of the digital subscriber line, the network control derive is placed in a state which can only receive a signal. A sending portion of the network control device is driven when, at a call from the terminal equipment, the terminal control device receives a line activation signal from the exchange equipment and when, at an incoming state from the state from the exchange terminal, the terminal control device receives a line activation from the exchange equipment. The synchronization pattern signal is sent from the sending portion to the exchange terminal so that the synchronization of the exchange terminal is established.

A mixed dual frequency generating system for generating a digital FSK signal or a signal including two mixed frequencies includes a ROM which stores in consecutive addresses sampled data obtained by sampling a sine wave at a sampling frequency. The mixed dual frequency generating system also includes a data extracting circuit for extracting the sampled data from the ROM at the sampling frequency using an extracting step number. An output data fixing circuit changes alternate data extracted from the ROM to data 'O', so that a signal having two mixed frequencies can be obtained.

Mixed dual frequency generating system

Growing community of inventors

Kawasaki, Japan

Ryoji Shimozono