Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Ryoji Asada

Shoji Nishikawa

Kazumasa Motoda

Hiromasa Funakoshi

Yasushi Fukushima

Akihiro Takeuchi

Kunio Sekimoto

Akira Usui

Shiro Kato

Takayuki Kimoto

Shigeru Awamoto

Hirofumi Uchida

Tadayuki Inoue

Hisako Chiaki

Katsuyuki Fukui

Takamasa Yokoyama

Yuki Kishida

Tadami Mine

Katsuji Kunisue

Tamotsu Akeyama

Yoshitaka Sakamoto

Disclosed is an image processor that reduces or eliminates the effects of a flash band regardless of performing a shutter operation or not. An imaging device includes a flash band detector configured to determine whether each image of the consecutive images shown by image signals output from an imager is a flash band image a part of which is affected by a flash, and a flash band compensator configured to, if a first image is determined as the flash band image, generate a third image which is supposed where the third image is fully affected by a flash by using a second image which is not determined as the flash band image, and output the third image instead of the first image.

Image processor

In an imaging apparatus, unevenness in brightness in screen due to flash is eliminated and video with secured continuity as a moving image can be obtained. In the imaging apparatus (), signals of fields affected by flash among video signals acquired by imaging are treated with adding or adding and averaging to equalize effects of flash which appear unevenly on a screen.

Imaging apparatus which corrects effects of flash

A video signal producing system includes an imaging device for obtaining progressive imaging signals having various frame rates, a recording device for recording an output signal of the imaging device and a reproduction device for reproducing a recording signal obtained from the recording device. The imaging device includes a frame rate converting portion for converting the imaging signals to an output having a predetermined frame rate and the reproduction device changes a reproduction speed in response to each of the various frame rates so as to generate an output having a substantial number of frames such that the substantial number of the frames assumes a predetermined value.

Video signal producing system and video signal recording/reproducing device in that system

The present invention includes a film or video image pickup signal recording/reproduction system having an image pickup apparatus outputting an image pickup signal, a recording apparatus recording the image pickup signal, a reproduction apparatus reproducing the recorded signal, a characteristic conversion apparatus switching the characteristic of the reproduced signal, and a display apparatus displaying the signal output from the characteristic conversion apparatus. The image pickup apparatus has two kinds of gamma curve characteristics. The gamma curve characteristic data is recorded by the recording apparatus and extracted by the reproduction apparatus. The gamma curve characteristic of a reproduction image is switched by the characteristic conversion apparatus depending on the data. The image is output on a display apparatus.

Characteristic correction apparatus for gamma correcting an image based on the image type

The present invention provides an imaging apparatus for converting a 24p imaging signal generated with a frame frequency of 24 Hz according to a progressive scanning system into asignal with a field frequency of 60 Hz by 2:3 pull-down processing according to an interlace scanning system which is a standard television system. The imaging apparatus prevents occurrence of a horizontal stripe and the like at the center of a screen and prevents degradation in picture quality. According to this inventive imaging apparatus, when the output timing of the 24p imaging signal from an imaging sectionis not equal to the phase of avertical synchronizing signal, the 24p imaging signal is inputted to a memory sectionafter being delayed by a delay sectionby a time during which thesignal is subjected to (&#xbd;) field scanning, and the 24p imaging signal is written in the memory sectionin synchronization with thevertical synchronizing signal.

Image pickup device

An imaging device uses a solid state imaging element, during multi-field accumulation to prevent shading and oscillatory phenomena such as repeated black and white patterns. A signal is supplied from a timing signal generation circuit to switches, and controls the ON/OFF operation. During the H period of the signal, the switch is closed, and the output value of an amplifier is input to a capacitor. During the L period of the signal, the switch is opened, and the average value of the output of the amplifier is maintained in the capacitor. During the H period, the switch is open, while during the L period, the switch is in the ON state. At this time, the level of the capacitor Cand the output of the amplifier are input to an amplifier, and their difference is amplified and supplied to a capacitor Cvia the switch.

Solid state imaging device having timing signal generation circuit and clamping circuit

A stable charge coupled device (CCD) imaging apparatus operable in multiple frame rates for displaying a signal having a low frame rate in a viewfinder (VF), and also a recorder built-in type imaging apparatus using the CCD imaging apparatus are presented. The imaging apparatus includes a drive pulse switching circuit for multiplying a CCD drive pulse other than a CCD read pulse by (n/2) (where n is an arbitrary integer) when the multi-frame rate is low, a frame memory for storing an output signal of the CCD of one frame right after pulse output. The signal is read at every (n/2) frames. The frame memory repeats to read out the stored signal in one frame (n/2) times. The imaging apparatus further includes a camera signal processing circuit for performing a camera process to an output signal of the frame memory, and a recorder unit for recording an output signal of the camera signal processing circuit at the frame rate of the set mode. As a result, even at a low frame rate, the apparatus displays a signal in the VF. And with a properly-selected value of n, the apparatus conducts a signal having various frame rate between a camera and the recorder at a common frame rate.

CCD imaging apparatus applicable to a multi-frame rate image system

A solid-state image sensing device comprising a photoelectric converter portion, a solid-state image sensor, and a controlling means. The photoelectric converter portion has a plurality of photoelectric converters arranged in two dimensions on a semiconductor substrate. The solid-state image sensor vertically transfers charges, transferred from the photoelectric converter portion, at separate times of first transfer and second transfer. Further, the photoelectric converter portion has a vertical transfer portion, in which first and fourth gates are provided for odd-numbered photoelectric converters, and second and third gates are provided for even-numbered photoelectric converters, and a horizontal transfer portion for horizontally transferring charges transferred from the vertical transfer portion. The controlling means supplies the vertical transfer portion with vertical transfer pulses and the horizontal transfer portion with horizontal transfer pulses. The controlling means transfers charges from the photoelectric converter portion to the vertical transfer portion such that the charges of odd-numbered pixels and the charges of even-numbered pixels are each transferred in a lump, respectively.

Solid state image sensing device

An image pickup apparatus operated in mode-1 in which signal-charge that is charged in a CCD imaging device is read out as the output signal of the CCD imaging device once in each field of progressive-scanning, or in mode-2 in which the signal-charge is read out once (viz. during one field) in every two fields of progressive-scanning. And the output signal of the CCD imaging device is written into a memory according to a progressive-scanning synchronizing signal during the intervals when the signal-charge is read out. Then the signal written in the memory is read out, in the mode-1, according to the progressive-scanning synchronizing signal, and, in the mode-2, in such a manner that odd lines are read out in each odd field and even lines are read out in each even field according to an interlaced-scanning synchronizing signal. The above structure enables the image pickup apparatus to have simple circuit, good performance, and to be usable for at least the two modes of the 525/60P mode and the 525/30P mode.

Image pickup apparatus

An apparatus for processing a progressive scanning video signal comprising a progressive to interlaced signal converter is provided. An input progressive scanning video signal is switched over alternately every one horizontal scanning line of progressive scanning so as to be divided into a main original signal and a sub-original signal. A time interval of the main original signal is expanded so as to convert the main original signal into a main signal having a period of horizontal scanning of interlaced scanning, whereas a time interval of the sub-original signal is expanded so as to convert the sub-original signal into a sub-signal having the period of the horizontal scanning of the interlaced scanning. Further, a synchronizing process is performed on the time-expanded main signal and the time-expanded sub-signal so as to output an interlaced scanning signal including the main signal and the sub-signal in synchronous with each other, and so that the main signal and the sub-signal start respectively from a pair of two horizontal lines which is continuously inputted after the first horizontal scanning line of the input progressive scanning video signal.

Apparatus for processing progressive scanning video signal comprising

A digital processing color camera includes a matrix circuit for arithmetically processing digital R, G and B video signals, which have been sampled by a clock signal, to provide a digital brightness signal, a first digital color difference signal and a second digital color difference signal. Those signals are subsequently converted by associated digital-to-analog converters into an analog brightness signal, a first analog color difference signal and a second analog color difference signal. Both the brightness signal and the first color difference signal, are delayed a predetermined period of time by digital delay lines inserted between the matrix circuit and the digital-to-analog converter circuit.

Growing community of inventors

Osaka, Japan

Ryoji Asada