Renesas Technology Corp.

Renesas Electronics Corporation

Ryoichi Sano

Hisashi Shiota

Shigezumi Matsui

Motoo Suwa

Satoshi Nakamura

Takashi Sato

Kazuyuki Sakata

Tsuyoshi Yaguchi

Kenzo Kuwabara

Yoshinori Miyaki

Toru Hayashi

Takanobu Naruse

A memory interface circuit is connectable to a DDR-SDRAM which outputs read data in synchronization with a data strobe signal together with the data strobe signal. A clock generator generates internal clock signals and memory clock signals supplied to the DDR-SDRAM. The memory interface circuit determines a delay of arrival of the data strobe signal relative to the corresponding internal clock signal by using a data strobe signal inputted in a read cycle with respect to the DDR-SDRAM, samples the arrived read data, based on a signal obtained by shifting the phase of the arrived data strobe signal, and synchronizes the sampled read data to the corresponding internal clock signal on the basis of the result of determination of the arrival delay.

Semiconductor integrated circuit

An electronic circuit includes a first semiconductor device and a second semiconductor device on a mounting substrate. The mounting substrate lines have lengths which are made unequal for respective bits. Assembling lines which reach connecting electrodes of a semiconductor chip from the external terminals of the second semiconductor device have made lengths thereof unequal for respective bits. The unequal lengths of the mounting substrate lines have a relationship which offsets the unequal lengths of the assembling lines.

Electronic circuit, a semiconductor device and a mounting substrate

Growing community of inventors

Kodaira, Japan

Ryoichi Sano