Hitachi, Ltd.

Hitachi Vlsi Engineering Corp.

Renesas Technology Corp.

Calsonic Kansei Corporation

Hitachi Microcomputer Engineering, Ltd.

Hitachi Ulsi Systems Co., Ltd.

Other

Hitachi Vsli Engineering Corp.

Kabushiki Kaisha Unwind

Ryoichi Hori

Kiyoo Itoh

Takao Watanabe

Goro Kitsukawa

Masashi Horiguchi

Jun Etoh

Takayuki Kawahara

Kazuyuki Miyazawa

Yoshiki Kawajiri

Kazuhiko Kajigaya

Kazuyoshi Oshima

Yasuhiro Kasama

Eiji Miyamoto

Akira Endo

Takashi Yamazaki

Yuji Sakai

Hiroshi Yoshioka

Yasunori Yamaguchi

Tetsurou Matsumoto

Makoto Morino

Shinji Udo

Shinichi Ikenaga

Mitsuhiro Takano

Sinichi Miyatake

Manabu Tsunozaki

Jiro Sawada

Hirokazu Saito

Atsushi Kumata

Katsuhiro Shimohigashi

Masakazu Aoki

Yutaka Kobayashi

Hitoshi Tanaka

Takahide Ikeda

Noriyuki Homma

Hideaki Uchida

Shinji Nakazato

Masahiro Yamamura

Nobuo Tanba

Yoshikazu Saito

Yoshinobu Nakagome

Masaharu Kubo

Takeshi Sakata

Hiroyuki Uchiyama

Katsutaka Kimura

Kunio Uchiyama

Yasushi Takahashi

Masamichi Ishihara

Hisashi Nakamura

Hidetoshi Iwai

Ryoichi Kurihara

Hiromi Matsuura

Kiyoo Ito

Masaya Muranaka

Shigeru Nishimatsu

Norikazu Hashimoto

Satoshi Oguchi

Yoshihisa Koyama

Hidetomo Aoyagi

Shigetoshi Sakomura

Haruo Ii

Takeshi Kizaki

Kazumasa Yanagisawa

Hiroo Masuda

Kunihiko Yamaguchi

Noriyuki Honma

Shiro Nakajima

Hiroyuki Okura

Satoshi Tamagawa

Toshitugu Takekuma

Goro Kitukawa

Masahiro Iwamura

Toshio Sasaki

Ikuro Masuda

Isao Yoshida

Osamu Minato

Hideo Sunami

Satoshi Kimura

Tetsuro Matsumoto

Toshiyuki Sakuta

Eiji Takeda

Hiroyuki Miyazawa

Naohisa Kamiyama

Masaaki Nakai

Hirotoshi Tanaka

Kyoichiro Asayama

Seigoh Yukutake

Toshio Maeda

Osamu Sakai

Masanori Tazunoki

Shinobu Asakawa

Akihiro Tanba

Noriyuki Hamma

Hiromi Tukada

Toshitugu Takemuma

Yoshikasu Saito

Kouetsu Chiba

Kyoko Uemura

Mitsuru Arahori

Smartphone case

An EGR device includes a first cooling passage that introduces a flowing medium discharged from an engine into a main radiator so that the flowing medium is cooled therein, and then returns the flowing medium to the engine, and a second cooling passage that introduces a part of the flowing medium cooled in the first cooling passage to a sub-radiator so that the flowing medium is further cooled therein. The second cooling passage introduces the flowing medium to an EGR cooler to return the flowing medium, which is discharged from the EGR cooler, to the engine.

EGR device

In a warm-up system that pre-warms up of an engine (E) by transferring heat from a heat source to an engine cooling water circulation circuit () of a vehicle, a residential hot water circuit () that uses a household heat source is provided as the heat source, and a one-touch connector () is provided in the engine cooling water circulation circuit () and the residential hot water circuit (). The one-touch connector () connects the two circuits () prior to start-up of the engine (E) such that heat is transferred to the engine cooling water circulation circuit (), and disconnects the two circuits () following heat transfer in preparation for start-up of the engine (E).

Warm-up system and warm-up method for in-vehicle power train

A radiator including a core part having a plurality of tubes and fins, a tank fluidically connected with the tank, an oil cooler contained in the tank, the oil cooler being provided with a pair of connecting pipes which fluidically communicate an interior of the oil cooler and penetrate a wall portion of the tank. The wall portion is formed with a projecting reinforcement portion which projects therefrom and is formed at least between the connecting pipes.

Radiator with built-in oil cooler

A semiconductor memory device formed on a semiconductor chip includes first memory arrays, a plurality of second memory arrays, a first voltage generator, and first bonding pads. The semiconductor chip is divided into first, second and third rectangle regions and the third rectangle region is arranged between the first rectangle region and the second rectangle region. The first memory arrays are formed in the first rectangle region. The second memory arrays are formed in the second rectangle region. The voltage generator and first bonding pads are arranged in the third rectangle region. The first bonding pads are arranged between the first rectangle region and the voltage generator and no bonding pads are arranged between the voltage generator and the second memory arrays.

Semiconductor memory device and defect remedying method thereof

A plurality of tubes and corrugated fins are piled up and arranged alternatively, for integrally assembled heat exchangers. The corrugated fin has fin portions for the heat exchangers and a connecting portion connecting the fin portions. The connecting portion is formed with slits arranged in first and second lines extending in a longitudinal direction of the fin and at least one louver between the slits in the lines. The slits in the first line and the slits in the second line traverse a top portion and a bottom portion adjacent to the top portion of the fin and the louver is formed on an intermediate portion between the top portion and the bottom portion so that the louver is located between the space of the slits in the first line and the space of the slits in the second line.

Corrugated fin for integrally assembled heat exchangers

A semiconductor memory device formed on a semiconductor chip comprises a plurality of first memory arrays, a plurality of second memory arrays, a first voltage generator, and a plurality of first bonding pads. The semiconductor chip is divided into a first rectangle region, a second rectangle region, and a third rectangle region and the third rectangle region is arranged between the first rectangle region and the second rectangle region. The plurality of first memory arrays are formed in the first rectangle region. The plurality of second memory arrays are formed in the second rectangle region. The voltage generator and the plurality of first bonding pads are arranged in the third rectangle region. The plurality of first bonding pads are arranged between the first rectangle region and the voltage generator and no bonding pads are arranged between the voltage generator and the plurality of second memory arrays.

A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit provided on the semiconductor chip for transforming an external power supply voltage received from the power supply terminal for supplying a source voltage resulting from the voltage transformation to the internal circuit, and a control circuit provided on the semiconductor chip for controlling the power supply circuit, wherein the control circuit includes external power supply voltage detecting means and/or temperature detecting means and responds to the signal from the external power supply voltage detecting means and/or the temperature detecting means by changing the power supply voltage to the internal circuit to thereby maintain the operating speed of the internal circuit to be constant.

Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions

A semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. This structure in which the peripheral circuits are arranged at the center portion of the chip permits the longest signal transition paths to be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.

Disclosed is a semiconductor device, such as a semiconductor memory device, having structure wherein invasion of minority carriers from the semiconductor substrate into components of the device, formed on the substrate, can be avoided. The semiconductor memory device can be an SRAM or DRAM, for example, and includes a memory array and peripheral circuit on a substrate. In one aspect of the present invention, a buried layer of the same conductivity type as that of the substrate, but with a higher impurity concentration than that of the substrate, is provided beneath at least one of the peripheral circuit and memory array. A further region can extend from the buried layer, for example, to the surface of the semiconductor substrate, the buried layer and further region in combination acting as a shield to prevent minority carriers from penetrating to the device elements. As a second aspect of the present invention, first carrier absorbing areas (to absorb minority carriers) are located between the memory array and the switching circuit of the peripheral circuit, and second carrier absorbing areas are provided to surround input protective elements of the device. As a third embodiment of the present invention, a plurality of isolation regions of the same conductivity type are provided, with unequal voltages applied to these isolation regions, or unequal voltages applied to the substrate, on the one hand, and to these isolation regions, on the other.

Semiconductor memory device

A semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. A benefit of this structure in which the peripheral circuits are arranged at the center portion of the chip, is that the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.

Semiconductor device formed in a rectangle region on a semiconductor substrate including a voltage generating circuit

Growing community of inventors

Tokyo, Japan

Ryoichi Hori