Sakai Display Products Corporation

Ryohei Takakura

Shigeru Ishida

Nobutake Nodera

Takao Matsumoto

Yoshiaki Matsushima

Kazuki Kobayashi

Taimi Oketani

Tomohiro Inoue

Satoru Utsugi

Satoshi Michinaka

Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The present invention is provided with: a gate electrode formed on a substrate; a gate insulation film formed so as to cover the gate electrode; a semiconductor layer which is formed on the upper side of the gate insulation film and which includes a polysilicon layer disposed, in a plan view, inside a region defined by the gate electrode; an etching stopper layer disposed on the upper side of the polysilicon layer; and a source electrode and a drain electrode provided on the semiconductor layer so as to be separated from each other, wherein the polysilicon layer has first and second regions which are not covered with the etching stopper layer, and a part of the source electrode exists above the first region and a part of the drain electrode exists above the second region.

Thin film transistor, display device, and thin film transistor manufacturing method

A semiconductor device includes a thin film transistor including: a substrate; a gate electrodesupported on the substrate; a semiconductor layerprovided on the gate electrode with a gate insulating layertherebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region SG that is located between the first region and the second region and overlaps with the gate electrode as seen from a direction normal to the substrate; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrodeelectrically connected to the first region with the first contact layer therebetween; and a drain electrodeelectrically connected to the second region with the second contact layer therebetween, wherein: the semiconductor layer includes a crystalline silicon region, and at least a portion of the crystalline silicon region is located in the source-drain interval region SG; and the semiconductor layer has at least one opening P that is located in the source-drain interval region SG and reaches the gate insulating layer.

Semiconductor device including thin film transistor and method for manufacturing the same

A semiconductor device includes a thin film transistorincluding: a semiconductor layerprovided on a gate electrodewith a gate insulating layertherebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region RG that is located between the first region and the second region and overlaps with the gate electrode as seem from a direction normal to a substrate; a protection layerarranged on the semiconductor layer; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrode; and a drain electrode, wherein: the semiconductor layerincludes a crystalline silicon region, and at least a portion of the crystalline silicon regionis located in the source-drain interval region RG; and at least one openingis provided that runs through the protection layerand the semiconductor layerand reaches the gate insulating layer, wherein the at least one openingis located in the source-drain interval region RG as seen from the direction normal to the substrate.

Semiconductor device and method for manufacturing same

In the present invention, a gate electrode is formed on a substrate surface, and an insulation film is formed on the substrate surface whereon the gate electrode has been formed. A first amorphous silicon layer is formed on the substrate surface whereon the insulation film has been formed. An energy beam is irradiated onto a plurality of required sites spaced from each other in the first amorphous silicon layer to transform each of the required sites into a polysilicon layer. Each of the required sites is situated on the upper side of the gate electrode and serves as a channel region between a source and a drain. This allows other sites, which are in the first amorphous silicon layer and related to the plurality of required sites, to also be irradiated by the energy beam and ablated so as to form at the other sites a cleared portion having a required shape. Thereafter, when a metal layer for the source electrode and the drain electrode is formed, the shape of the cleared portion, which is a recessed portion, is followed, thereby forming a depression in the metal layer. Consequently, the depression is used as an alignment mark, and the source electrode and the drain electrode are formed at appropriate positions on the upper side of the channel region.

Method for manufacturing thin film transistor and display panel

The thin film transistor includes: a gate electrode formed on a surface of a substrate; a polysilicon layer formed on an upper side of the gate electrode; an amorphous silicon layer formed on the polysilicon layer so as to cover the same; an n+ silicon layer formed on an upper side of the amorphous silicon layer; and a source electrode and a drain electrode which are formed on the n+ silicon layer, wherein, in a projected state in which the polysilicon layer, the source electrode and the drain electrode are projected onto the surface of the substrate, a part of the polysilicon layer and a part of each of the source electrode and the drain electrode are adapted so as to be overlapped with each other, and in the projected state, a minimum dimension, in a width direction orthogonal to a length direction between the source electrode and the drain electrode, of the polysilicon layer located between the source electrode and the drain electrode is smaller than dimensions in the width direction of the source electrode and the drain electrode.

Thin film transistor and display panel

The method for manufacturing a thin film transistor includes the processes of forming a gate electrode on a surface of a substrate, forming an insulation film on the surface of the substrate on which the gate electrode is formed, forming a first amorphous silicon layer on the surface of the substrate on which the insulation film is formed, annealing a plurality of required places separated from each other on the first amorphous silicon layer by irradiating the same with an energy beam to change the required places to a polysilicon layer, forming a second amorphous silicon layer by covering the polysilicon layer, forming an n+ silicon layer on a surface of the second amorphous silicon layer, etching the first amorphous silicon layer, the second amorphous silicon layer and the n+ silicon layer.

Method for manufacturing thin film transistor, thin film transistor and display panel

The thin film transistor includes a gate electrode formed on a surface of a substrate; a first amorphous silicon layer formed on an upper side of the gate electrode; a plurality of polysilicon layers separated by the first amorphous silicon layer and formed on the upper side of the gate electrode with a required spaced dimension; a second amorphous silicon layer and an n+ silicon layer which are formed on the upper side of the plurality of polysilicon layers and the first amorphous silicon layer; and a source electrode and a drain electrode formed on the n+ silicon layer.

Growing community of inventors

Sakai, Japan

Ryohei Takakura