Toppan Printing Co., Ltd.

Ryohei Matsubara

Mamoru Ishizaki

Manabu Ito

Masato Kon

Osamu Kina

Toru Okubo

Kaoru Hatta

A thin film transistor array includes thin film transistors each including a gate electrode formed on an insulation substrate, a source electrode and a drain electrode formed on the gate electrode via a gate insulation film and a semiconductor layer formed on a portion of the gate electrode surrounded by at least the source electrode and the drain electrode; capacitors each including a capacitor electrode formed on the insulation substrate and a pixel electrode which is formed on the capacitor electrode via the gate insulation film and connected to the drain electrode, the capacitors and the thin film transistors being positioned in a matrix along a first direction and a second direction perpendicular to the first direction; and connection lines that connect semiconductor layers of the thin film transistors positioned in the first direction. The connection lines each have a width smaller than a width of the semiconductor layer.

Thin film transistor array

A thin film transistor array including a substrate, thin film transistors each including a gate electrode formed on the substrate, a source electrode, a drain electrode, a semiconductor layer formed between the source electrode and the drain electrode, an interlayer insulation film formed on the drain electrode, and an upper pixel electrode formed on the interlayer insulation film, and an insulation layer having light shielding property is formed between adjacent upper pixel electrodes.

Thin film transistor array and manufacturing method of the same

A thin film transistor array includes thin film transistors positioned in a matrix, each of the thin film transistors including a substrate, a gate electrode formed on the substrate, a gate insulation layer formed on the gate electrode, a source electrode formed on the gate insulation layer, a drain electrode formed on the gate insulation layer, a pixel electrode formed on the gate insulation layer and connected to the source electrode and the drain electrode, a semiconductor layer formed between the source electrode and the drain electrode, an interlayer insulation film covering the source electrode, the drain electrode, the semiconductor layer and a portion of the pixel electrode, and an upper pixel electrode formed on the interlayer insulation film and connected to the pixel electrode. The interlayer insulation film has one or more concave portions and one or more via hole portions.

In a thin-film transistor array according to an embodiment of the present invention, thin-film transistors are disposed in a matrix array, the thin-film transistor including a gate electrode that is formed on a substrate, a gate insulating layer that is formed on the gate electrode, a source electrode that is formed on the gate insulating layer, a pixel electrode that is formed on the gate insulating layer, a drain electrode that is connected to the pixel electrode, and a semiconductor layer that is formed between the source electrode and the drain electrode, the gate electrode is connected to a gate line while the source electrode is connected to a source line, the thin-film transistor is formed within a region of the source line and the thin-film transistor array includes a stripe insulating film such that the source line and the semiconductor layer are covered with the stripe insulating film.

Thin-film transistor array and image display device in which thin-film transistor array is used

A laminated body includes a lower electrode formed on a substrate and a basic insulating film which is formed above the lower electrode and covers the lower electrode on the substrate, in which the lower electrode has a film thickness reduction section in which the film thickness of the lower electrode in a portion which is not covered by the basic insulating film is smaller than the film thickness of the lower electrode in a portion which is covered by the basic insulating film in the lower electrode.

Method of manufacturing laminated body and laminated body

One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.

Thin film transistor array, method for manufacturing the same, and active matrix type display using the same

One embodiment of the present invention is a thin film transistor, including: an insulating substrate; a gate electrode and a gate insulator being formed on the insulating substrate, in this order; a source electrode and a drain electrode formed on the gate insulator, surface preparation of the source electrode and the drain electrode being performed with a compound having a functional group with an electron-withdrawing property; and a semiconductor film formed on the gate insulator, the film being formed between the source electrode and the drain electrode.

Thin film transistor and method for manufacturing the same

One embodiment of the present invention is a thin film transistor array including an insulating substrate, a plurality of thin film transistors and a sealing layer. The sealing layer is stripe-shaped and covers a plurality of the thin film transistors. The sealing layer is formed over the insulating substrate.

Thin film transistor array, method for manufacturing the same and active matrix display

One embodiment of the present invention is a thin film transistor having a gate electrode formed on an insulating substrate, a gate wire connected to the gate electrode, a capacitor electrode, a capacitor wire connected to the capacitor electrode, a gate insulator formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulator, a sealing layer formed on the oxide semiconductor pattern, a drain electrode and a source electrode formed on the sealing layer, a drain wire connected to the drain electrode and a pixel electrode connected to the source electrode, the drain wire and the pixel electrode being in the same layer as the drain electrode and the source electrode. Wherein the gate wire, the capacitor electrode and the capacitor wire are in the same layer as the gate electrode, and wherein the sealing layer does not cover a connection part of the source electrode and a connection part of the drain electrode and wherein the drain electrode and the source electrode are connected to the oxide semiconductor pattern via the connection part of the drain electrode and the connection part of the source electrode.

Thin film transistor, method for manufacturing the same and display using the same

One embodiment of the present invention is a thin film transistor including a gate electrode formed on an insulating substrate, a gate insulator formed on the gate electrode, a drain electrode and a source electrode formed on the gate insulator, an oxide semiconductor pattern formed between the drain electrode and the source electrode, and a sealing layer formed on the oxide semiconductor pattern.

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Tokyo, Japan

Ryohei Matsubara