Hitachi, Ltd.

Ryo Yamagatu

Tadashi Sato

Tetsuji Ogawa

Kazuhiko Ninomiya

An apparatus transfers data between a plurality of input/output (I/O) devices and a main storage unit and includes a plurality of channel devices and a channel control unit. Each channel device is provided with a first data buffer for holding data to be transferred to and transferred from an I/O device. The channel control unit has an address register and a second data buffer. An address register is provided for each channel device, and holds an address of the main storage unit at which address the data to and from the I/O device is stored, and the second data buffer holds the data to be transferred to and transferred from the I/O device, which data is accessed based on the address designated by the address register. A data bus is connected between the first and second data buffers, the data bus having a bit capacity larger than that for data transfer between the I/O device and the channel device.

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Hadano, Japan

Ryo Yamagatu