Kawasaki Microelectronics, Inc.

Ryo Nakamura

The method of manufacturing the semiconductor device that includes a high voltage MOS transistor with high operating voltage under both high and low gate voltages with low-cost is disclosed. When manufacturing the high voltage MOS transistor, a portion of a gate insulation film is removed to form an opening that exposes an outside area of the active area, which is outside of the central area where a gate electrode will be formed. A shallow grade layer is formed by implanting impurities into an opening with an energy that does not permit penetration of impurity ions through the gate insulation film.

Method of manufacturing a semiconductor device including a high voltage MOS and the semiconductor device manufactured by the method

Method of manufacturing semiconductor device and the semiconductor device manufactured by the method

A liquid crystal display device includes a plurality of display elements arranged in a first and a second direction on a surface of a semiconductor substrate. Each of the display elements includes a transistor formed on the semiconductor substrate; a pixel electrode driven by the drain output of the transistor; and a capacitor for storing the drain output of the transistor. The capacitors each include a diffusion region formed in the surface of the semiconductor substrate and an upper electrode facing with the diffusion region with an insulating film between them. The capacitor diffusion regions of adjacent two display elements arranged in the second direction extend along a border between the two elements and merge with each other at the border.

Growing community of inventors

Mihama-ku, Japan

Ryo Nakamura