Toyoda Gosei Co., Ltd.

Sumitomo Electric Industries, Limited

Koito Manufacturing Company, Ltd.

Meijo University

Ryo Nakamura

Kengo Nagata

Misato Boyama

Isamu Akasaki

Tetsuya Takeuchi

Motoaki Iwaya

Satoshi Kamiyama

Naoki Sone

Kazuyoshi Iida

Masaki Oya

Misato Mukono

Lu Weifang

Provided is a semiconductor light emitting device including a growth substrate; a pillar-shaped semiconductor layer formed on the growth substrate; and a buried semiconductor layer formed to cover the pillar-shaped semiconductor layer, wherein the pillar-shaped semiconductor layer has an n-type nanowire layer formed at a center, an active layer formed on an outermore side than the n-type nanowire layer, a p-type semiconductor layer formed on an outermore side than the active layer and a tunnel junction layer formed on an outermore side than the p-type semiconductor layer, and wherein at least a part of the pillar-shaped semiconductor layer is provided with a removed region formed by removing from the buried semiconductor layer to a part of the tunnel junction layer.

Semiconductor light emitting device and manufacturing method of semiconductor light emitting device

An emission efficiency of a light-emitting device is improved by reducing strains applied to a light-emitting layer. On a sapphire substrate, an n-type contact layer, an nESD layer, an n-type cladding layer, a light-emitting layer, a p-type cladding layer, and a p-type contact layer, are sequentially deposited. The light-emitting layer has a MQW structure in which a layer unit of a well layer, a capping layer, and a barrier layer sequentially deposited is repeatedly deposited. Of the well layers, the In composition ratio of only first well layer is reduced than the In composition ratios of other well layers, and the In composition ratios of the other well layers are equal to each other. The In composition ratio of the first well layer is designed so that the emission wavelength of the first well layer is equal to the emission wavelengths of other well layers.

Light-emitting device and production method therefor

To provide a Group III nitride semiconductor light-emitting device production method, which is intended to grow a flat light-emitting layer without reducing the In concentration of the light-emitting layer. The method of the techniques includes an n-side superlattice layer formation step, in which an InGaN layer, a GaN layer disposed on the InGaN layer, and an n-type GaN layer disposed on the GaN layer are repeatedly formed. In formation of the InGaN layer, nitrogen gas is supplied as a carrier gas. In formation of the n-type GaN layer, a first mixed gas formed of nitrogen gas and hydrogen gas is supplied as a carrier gas. The first mixed gas has a hydrogen gas ratio by volume greater than 0% to 75% or less.

Method of producing group III nitride semiconductor light-emitting device

On the well layer, a first InGaN protective layer is formed at the same temperature employed for the well layer through MOCVD. TMI is pulse supplied. A TMI supply amount is kept constant at a predetermined value of more than 0 &#x3bc;mol/min and not more than 2 &#x3bc;mol/min. Moreover, a duty ratio is kept constant at a predetermined value of more than 0 and not more than 0.95. The In composition ratio of the first protective layer is almost directly proportional to the duty ratio. The In composition ratio of the first protective layer can be easily and accurately controlled by controlling the duty ratio so as to have an In composition ratio within a range of more than 0 at % and not more than 3 at %.

Method for producing light-emitting device and method for producing group III nitride semiconductor

The present invention provides a Group III nitride semiconductor light-emitting device having a flat semiconductor layer, in which the stress applied to the light-emitting layer is relaxed. The light-emitting layer of the light-emitting device includes a well layer and a barrier layer comprising an AlGaN layer containing In. The light-emitting device has a pit extending from an n-type semiconductor layer to layers above the light-emitting layer. A pit diameter at an interface between the light-emitting layer and the n-type semiconductor layer is 120 nm to 200 nm. The barrier layer has an In concentration of 6.0&#xd7;10cm.

Group III nitride semiconductor light-emitting device

The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission performance. In a MQW structure light-emitting layer in which a plurality of layer units is repeatedly deposited, each layer unit comprising an InGaN well layer, a GaN protective layer, and an AlGaN barrier layer sequentially deposited, the protective layer is formed as follows. The protective layer is grown at the same temperature as employed for the well layer. The growth rate of the protective layer is larger than 0.5 times and not larger than 1.1 times the growth rate of the well layer. The protective layer is formed so as to have a thickness of 5 &#x212b; to 8 &#x212b; at the start of growth of the barrier layer being formed thereafter.

Method for producing group III nitride semiconductor light-emitting device

The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission performance. A light-emitting layer has a MQW structure in which a plurality of layer units are repeatedly deposited, each layer unit comprising a well layer, a protective layer, and a barrier layer sequentially deposited. The protective layer has a layered structure comprising a second protective layer disposed in contact with and on the well layer, and a first protective layer disposed in contact with and on the second protective layer. The second protective layer is formed of GaN. The first protective layer is formed of AlGaInN. The first protective layer has a bandgap larger than that of the well layer and not larger than that of the barrier layer. Moreover, the first protective layer has an In composition ratio of more than 0% and not more than 4%.

Group III nitride semiconductor light-emitting device and production method therefor

The present invention provides a method for producing a Group III nitride semiconductor light-emitting device wherein in the formation of a light-emitting layer by forming a well layer, a capping layer and a barrier layer, the well layer having superior flatness and crystallinity is formed while suppressing the occurrence of damage to the well layer. In formation of the light-emitting layer, pits are provided in the light-emitting layer so that a pit diameter D falls within a range of 120 nm to 250 nm. The light-emitting layer formation step comprises the steps of forming the barrier layer, forming the well layer, and forming the capping layer. The growth temperature of the barrier layer is higher by any temperature in a range of 65&#xb0; C. to 135&#xb0; C. than that of the well layer.

An MQW-structure light-emitting layer is formed by alternately stacking InGaN well layers and AlGaN barrier layers. Each well layer and each barrier layer are formed so as to satisfy the following relations: 12.9&#x2266;&#x2212;2.8x+100y&#x2266;37 and 0.65&#x2266;y&#x2266;0.86, or to satisfy the following relations: 162.9&#x2266;7.1x+10z&#x2266;216.1 and 3.1&#x2266;z&#x2266;9.2, here x represents the Al compositional ratio (mol %) of the barrier layer, and y represents the difference in bandgap energy (eV) between the barrier layer and the well layer, and z represents the In compositional ratio (mol %) of the well layer.

A Group III nitride semiconductor light-emitting device includes a sapphire substrate; and an n contact layer, an n cladding layer, a light-emitting layer, a p cladding layer, and a p contact layer, each of the layers being formed of Group III nitride semiconductor, are sequentially deposited on the sapphire substrate. The n cladding layer includes two layers of a high impurity concentration layer and a low impurity concentration layer in this order on the n contact layer, and the low impurity concentration layer is in contact with the light-emitting layer. The low impurity concentration layer is a layer having a lower n-type impurity concentration than that of the high impurity concentration layer, which has an n-type impurity concentration of 1/1000 to 1/100 of the p-type impurity concentration of the p cladding layer and a thickness of 10 &#x212b; to 400 &#x212b;.

The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission performance and high electrostatic breakdown voltage. The Group III nitride semiconductor light-emitting device has a layered structure in which an n-type contact layer, an ESD layer, an n-type cladding layer, a light-emitting layer, a p-type cladding layer, and a p-type contact layer are deposited on a sapphire substrate. The ESD layer has a pit. The n-type cladding layer and the light-emitting layer are formed without burying the pit. The pit has a diameter of 110 nm to 150 nm at an interface between the n-type cladding layer and the light-emitting layer. The barrier layer of the light-emitting layer is formed of AlGaN having an Al composition ratio of 3% to 7%.

A method of making a group III nitride-based compound semiconductor includes providing a semiconductor substrate comprising group III nitride-based compound semiconductor, polishing a surface of said semiconductor substrate such that said polished surface includes an inclined surface that has an off-angle &#x3b8; of 0.15 degrees or more and 0.6 degrees or less to one of an a-face, a c-face and an m-face of the semiconductor substrate, providing a stripe-shaped specific region on the polished surface, the specific region comprising a material that prevents the growth of the group III nitride-based compound semiconductor on its surface, and growing a semiconductor epitaxial growth layer of group III nitride-based compound semiconductor on the polished surface of the semiconductor substrate. The specific region is provided on the polished surface such that the longitudinal direction of the specific region intersects with the longitudinal direction of a step portion that is formed with an atom-layer height on the polished surface by introducing the off-angle &#x3b8;.

Method of making group III nitride-based compound semiconductor

A method of making a group III nitride-based compound semiconductor has the steps of: providing a semiconductor substrate with a polished surface, the semiconductor substrate being of group III nitride-based compound semiconductor; and growing a semiconductor epitaxial growth layer of group III nitride-based compound semiconductor on the semiconductor substrate. The polished surface is an inclined surface that has an off-angle &#x3b8; of 0.15 degrees or more and 0.6 degrees or less to a-face, c-face or m-face of the semiconductor substrate.

Growing community of inventors

Kiyosu, Japan

Ryo Nakamura