Fuji Electric Co., Ltd.

Ryo Maeta

Takeyoshi Nishimura

Shunji Takenoiri

Toshiaki Sakata

Isamu Sugai

A semiconductor device has an active region through which current passes and an edge termination structure region. On a front surface of a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type is provided. On a surface of the first semiconductor layer, a parallel pn structure including first columns of the first conductivity type and second columns of a second conductivity type disposed to repeatedly alternate one another is provided. The second columns in the active region include first regions and second regions. A distance from the front surface of the semiconductor substrate to a bottom surface of one of the first regions is greater than a distance from the front surface of the semiconductor substrate to a bottom surface of one of the second regions.

Superjunction semiconductor device having parallel PN structure with column structure and method of manufacturing the same

A semiconductor device has an active region through which current flows and a termination structure region. At a front surface of a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type is provided. At a surface of the first semiconductor layer, a lower parallel pn structure is provided. At a surface of the lower parallel pn structure, an upper parallel pn structure is provided in the termination structure region and a first semiconductor region of a second conductivity type is provided in the active region. A width of an upper second column is wider than a width of a lower second column. An interval between the upper second columns is wider than an interval between the lower second columns. A thickness of the upper second column is thicker than a thickness of the first semiconductor region.

Semiconductor device

Semiconductor device and method of manufacturing semiconductor device

A semiconductor device has a termination structure region that includes a lower parallel pn structure having lower first-columns of a first conductivity type and lower second-columns of a second conductivity type; a center parallel pn structure having center first-columns of the first conductivity type and first rings of the second conductivity type; an upper parallel pn structure having upper first-columns of the first conductivity type and upper second-columns of the second conductivity type; and an uppermost parallel pn structure having uppermost first-columns of the first conductivity type and second rings of the second conductivity type. The first and second rings are wider than the lower second-columns. An interval between the first rings and between the second rings is wider than an interval between the lower second-columns. Positions of the first rings differ from positions of the second rings, along a direction parallel to a front surface of the semiconductor device.

A SJ-MOSFET includes a parallel pn layer in which an n-type drift region and a p-type partition region are alternately arranged repeatedly along a direction parallel to a base main-surface. The n-type drift region and the p-type partition region have total impurity amounts that are roughly the same and widths that are basically constant over an entire depth direction. The n-type drift region is configured to have an n-type impurity concentration profile in which an impurity concentration of a portion on the drain-side is higher than an impurity concentration of a portion on the source-side by &#x394;C. The p-type partition region is configured to have a p-type impurity concentration profile in which an impurity concentration of a portion on the drain-side is higher than an impurity concentration of a portion on the source-side by &#x394;C, and an impurity concentration of part of the portion on the source-side is relatively low.

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Matsumoto, Japan

Ryo Maeta