Renesas Electronics Corporation

Ryo Kanda

Tetsu Toda

Yasushi Nakahara

Yoshinori Kaya

Tomonobu Kurihara

Hiroshi Kuroiwa

Takamitsu Kanazawa

Kuniharu Muto

Junichi Nakamura

Hitoshi Matsuura

Yukihiro Sato

Koichi Yamazaki

Akira Muto

Masatoshi Maeda

Kazuyuki Umezu

Azuma Araya

Takahiro Nagatsu

Koji Bando

Akihiro Tamura

Hirobumi Minegishi

According to an embodiment, a semiconductor deviceincludes a semiconductor substrateincluding an upper surface, a trench electrodeprovided inside a trenchformed on the upper surface, and a trench insulating filmprovided between the trench electrodeand the semiconductor substrate. The semiconductor substrateincludes a first semiconductor layer of a first conductivity type, a lower end of the trench electrodereaching the first semiconductor layer, a deep layerof a second conductivity type partially provided on the first semiconductor layer in contact with the trench insulating film, a second semiconductor layer of the second conductivity type provided on the first semiconductor layer and on the deep layerin contact with the trench insulating film, and a third semiconductor layer of the first conductivity type provided on the second semiconductor layer above the deep layer

Semiconductor device with a trench electrode provided inside a trench formed on an upper surface of the semiconductor substrate and method of manufacturing the same

In one embodiment, a semiconductor device includes a semiconductor substrate having an upper surface, a trench electrode placed inside a trench formed on the upper surface, and a trench insulating film placed between the trench electrode and the semiconductor substrate, and the semiconductor substrate includes a drift layer, a floating layer for electric field reduction, a hole barrier layer, a body layer and an emitter layer, and the emitter layer, the body layer and the hole barrier layer are separated from the drift layer by the floating layer for electric field reduction, and a path of a carrier passing through an inverted layer formed in the body layer includes the body layer, the hole barrier layer, a non-inverted region of the floating layer for electric field reduction, and the drift layer.

Semiconductor device and method of manufacturing the same

A semiconductor device includes a first and second semiconductor chips, a resistive component, and a semiconductor chip including a first circuit coupled to electrodes on both ends of the resistive component. A sealing body has a first long side, a second side, a third short side, and a fourth short side. In a Y-direction, each of the first and second semiconductor chips is disposed at a position closer to the first side than to the second side, while the semiconductor chip is disposed at a position closer to the second side than to the first side. Also, in the Y-direction, the resistive component, the second semiconductor chips, and the first semiconductor chips are arranged in order of increasing distance from the third side toward the fourth side, while the semiconductor chip is disposed at a position closer to the third side than to the fourth side.

Semiconductor device

To realize a reduction in the number of parts in a system including a driver IC (semiconductor device). A high potential side power supply voltage is applied to a power supply application area. A high side area is formed with a circuit which includes a driver driving a high side transistor and is operated at a boot power supply voltage with a floating voltage as a reference. A low side area is formed with a circuit operated at a power supply voltage with a low potential side power supply voltage as a reference. A first termination area is disposed in a ring form so as to surround the power supply application area. A second termination area is disposed in a ring form so as to surround the high side area.

Semiconductor device and power control device

According to one embodiment, a semiconductor device includes a semiconductor substrate, a trench electrode provided in a trench, a trench insulating film provided between the trench electrode and the semiconductor substrate, a MOS electrode provided near the trench electrode, and a MOS insulating film provided between the MOS electrode and the semiconductor substrate, in which the semiconductor substrate includes a first semiconductor layer, a second semiconductor layer provided over the first semiconductor layer, a third semiconductor layer provided over the second semiconductor layer, a fourth semiconductor layer provided below the MOS electrode, and one and the other of fifth semiconductor layers provided on both sides of the fourth semiconductor layer, and in which the semiconductor device further includes a wiring layer that couples the one of the fifth semiconductor layers and the second semiconductor layer together.

Semiconductor device and manufacturing method thereof

A high-performance trench gate IGBT is provided. A trench gate IGBT according to one embodiment includes: a semiconductor substrate (); a channel layer () provided on the semiconductor substrate (); two floating P-type layer () provided on both sides of the channel layer, the floating P-type layers () being deeper than the channel layer (); two emitter trenches () disposed between the two floating P-type layers (), the emitter trenches () being respectively in contact with the floating P-type layers (); at least two gate trenches () disposed between the two emitter trenches (); and a source diffusion layer () disposed between the two gate trenches, the source diffusion layer () being in contact with each of the gate trenches ().

Trench gate IGBT

A driver IC includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense MOS that is arranged between a floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area. A fault detection circuit that detects presence of a fault when a voltage of the first sense node is higher than a decision voltage that has been determined in advance in a period of time that a low side driver is driving a low side transistor into an ON state is formed in the first area.

Semiconductor device and electric power control apparatus

To improve the reliability of a semiconductor device. A chip mounting portion TABis arranged to be shifted to the +x direction side. Further, a gate electrode pad of a semiconductor chip CHP(LV) and a pad of a semiconductor chip CHPare electrically coupled by a wire Wand a wire Wthrough a relay lead RL. Likewise, a gate electrode pad of a semiconductor chip CHP(LW) and the pad of the semiconductor chip CHPare electrically coupled by a wire Wand a wire Wthrough a relay lead RL. At this time, the structures of parts of the relay leads RLand RL, which are exposed from a sealing body MR are different from the structures of respective parts exposed from the sealing body MR, of a plurality of leads LDand LDwhich function as external terminals.

A semiconductor device including a first circuit region in which a first circuit whose power supply potential is a first voltage is formed; a second circuit region in which a second circuit whose power supply potential is a second voltage lower than the first voltage is formed a separation region which separates the first circuit region from the second circuit region; and a transistor which is located in the separation region and couples the second circuit to the first circuit and whose source and drain are of a first conductivity type, the separation region including an element separation film; a first field plate which overlaps with the element separation film in plan view; a plurality of conductive films which are provided over the first field plate.

A method of controlling a power supply to a semiconductor device including a first region having a high-side drive circuit, a second region having a signal processing circuit, a low-side drive circuit and a voltage control circuit, and a separation region formed between the first and second regions and having a rectifying element, includes turning on a first control signal to the voltage control circuit, turning off the first control signal to the voltage control circuit, and repeating the turning on of the first control signal and the turning off the first control signal.

Reliability of a semiconductor device is improved. A third semiconductor chip on which a control circuit is formed, and a first semiconductor chip of a plurality of IGBT chips are electrically connected via a high-side relay board. That is, the first semiconductor chip and the third semiconductor chip are electrically connected via a first wire, a high-side relay board and a second wire. Similarly, the third semiconductor chip on which the control circuit is formed and a second semiconductor chip of a plurality of IGBT chips are electrically connected via a low-side relay board. That is, the second semiconductor chip and the third semiconductor chip are electrically connected via the first wire, the low-side relay board and the second wire.

Semiconductor module

A driver integrated circuit includes a bootstrap circuit (BSC) configured to output a boot power supply voltage (VB) based on a first power supply voltage, the boot power supply voltage being higher than the first power supply voltage; a level shift circuit (LSC) configured to output an output pulse signal based on an input pulse signal and the boot power supply voltage; a high side driving circuit (HSU) configured to output a high side driving voltage based on the boot power supply voltage and the output pulse signal, wherein the bootstrap circuit includes a sense metal oxide semiconductor (MOS) transistor and a boot MOS transistor, wherein the sense MOS transistor includes a depression-type transistor.

Semiconductor device, power control device and electronic system

A driver IC includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense MOS that is arranged between floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area. A fault detection circuit that detects presence of a fault when a voltage of the first sense node is higher than a decision voltage that has been deteLutined in advance in a period of time that a low side driver is driving a low side transistor into an ON state is formed in the first area.

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Tokyo, Japan

Ryo Kanda