Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Ryo Kajitani

Tetsuzo Ueda

Masahiro Ishida

Satoshi Tamura

Daisuke Shibata

Kenichiro Tanaka

Masahiro Ogawa

Yoshiharu Anda

Satoshi Nakazawa

Naohiro Tsurumi

Hideki Kasugai

Shinji Ujita

Nanako Hirashita

A semiconductor relay includes: a light-emitting element; and a light-receiving element facing the light-emitting element. The light-receiving element includes: a substrate; a semiconductor layer having a direct transition type, the semiconductor layer being disposed on the substrate and having a semi-insulating property; a first electrode having at least a part in contact with the semiconductor layer; and a second electrode having at least a part in contact with either one of the semiconductor layer and the substrate, in a position separated from the first electrode. The semiconductor layer is reduced in resistance by absorbing light from the light-emitting element.

Semiconductor relay

A field effect transistor having a reduced sheet resistance is provided. A channel layer, a first spacer layer, a second spacer layer, a first electronic barrier layer, and a second electronic barrier layer are sequentially grown on the main surface of a substrate. A gate recess is created, and then an ion implanted section is formed. A third electronic barrier layer and a p-type layer are formed by a metalorganic chemical vapor deposition (MOCVD) method. The p-type layer except a portion at the gate recess is removed. B ions are implanted in the regrown third electronic barrier layer to reform the ion implanted section. A source electrode and a drain electrode are formed on the third electronic barrier layer. Then a gate electrode is formed on the p-type layer.

Field effect transistor

A nitride semiconductor device includes: a substrate having a first major surface and a second major surface; a first nitride semiconductor layer of an n-type which is disposed on the first major surface and has a protrusion; a second nitride semiconductor layer of a p-type disposed on the protrusion; a first anode electrode disposed above the first nitride semiconductor layer and the second nitride semiconductor layer; and a cathode electrode disposed under the second major surface, and a lateral surface of the protrusion is inclined by a first angle with respect to the first major surface.

Nitride semiconductor device

A nitride semiconductor device includes: a substrate of a first conductivity type having a first surface and a second surface on a side of the substrate opposite the first surface; a first nitride semiconductor layer of the first conductivity type which is disposed on the first surface of the substrate and includes an acceptor impurity; a second nitride semiconductor layer of a second conductivity type disposed on the first nitride semiconductor layer, the second conductivity type being opposite to the first conductivity type; a first electrode disposed on the second surface of the substrate; a second electrode disposed on the first nitride semiconductor layer; and a gate electrode disposed on the second nitride semiconductor layer.

Provided is a semiconductor device in which electron mobility is improved by applying sufficiently large tensile stress in a predetermined direction without occurrence of cracks in a nitride semiconductor. The semiconductor device includes: substrate (), electron transit layer () that is disposed on substrate () and is formed by GaN; and electron supply layer () that is disposed on electron transit layer () and is formed by AlGaN. A coefficient of thermal expansion of substrate () is different between a first direction in a main surface of substrate () and a second direction that is perpendicular to the first direction in the main surface, and tensile stress occurs in electron transit layer ().

Semiconductor device

An object is to achieve an increase in gain by reducing a current collapse, and reducing Cgd and Rg. A semiconductor device according to the present invention includes a substrate; a first semiconductor layer disposed on the substrate and made of a Group III nitride semiconductor; a second semiconductor layer disposed on the first semiconductor layer and made of a Group III nitride semiconductor; a gate electrode, a source electrode, and a drain electrode disposed on the second semiconductor layer; a first field plate electrode disposed on the second semiconductor layer; and a second field plate electrode disposed on the first field plate electrode, in which the first field plate electrode and the second field plate electrode are disposed between the gate electrode and the drain electrode.

A field effect transistor includes a nitride semiconductor multilayer structure formed on a substrate, a source electrode, a drain electrode, a gate electrode, an insulating film formed on the nitride semiconductor multilayer structure, and a field plate formed on and in contact with the insulating film, and having an end located between the gate electrode and the drain electrode. The insulating film includes a first film, and a second film having a dielectric breakdown voltage lower than that of the first film, and a thin film portion formed between the gate electrode and the drain electrode is formed in the insulating film. The field plate covers the thin film portion, and is connected to the source electrode in an opening.

A nitride semiconductor device in which contact resistance between an ohmic electrode and an ohmic recess portion is reduced and a method of manufacturing the nitride semiconductor device are provided. The nitride semiconductor device includes: a first nitride semiconductor layer formed on a substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a bandgap wider than a bandgap of the first nitride semiconductor layer; an ohmic recess portion formed in at least the second nitride semiconductor layer; and an ohmic electrode provided in contact with the ohmic recess portion. The ohmic recess portion includes a corrugated structure in at least a part of a plane in contact with the ohmic electrode.

Nitride semiconductor device and method of manufacturing nitride semiconductor device

A nitride semiconductor device includes a first nitride semiconductor layer formed on a substrate, a defect induced layer formed on the first nitride semiconductor layer, and a second nitride semiconductor layer formed on the defect induced layer, contacting the defect induced layer, and having an opening through which the defect induced layer is exposed. The defect induced layer has a higher crystal defect density than those of the first and second nitride semiconductor layers.

Nitride semiconductor device and method for fabricating the same

A nitride semiconductor device includes an active layer formed between an n-type cladding layer and a p-type cladding layer, and a current confining layer having a conductive area through which a current flows to the active layer. The current confining layer includes a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The second semiconductor layer is formed on and in contact with the first semiconductor layer and has a smaller lattice constant than that of the first semiconductor layer. The third semiconductor layer is formed on and in contact with the second semiconductor layer and has a lattice constant that is smaller than that of the first semiconductor layer and larger than that of the second semiconductor layer.

Growing community of inventors

Osaka, Japan

Ryo Kajitani