L-3 Communications Corporation

L3harris Technologies, Inc.

L3 Technologies, Inc.

L-3 Communciations Corp.

Ryan W Hinton

Joshua D Gunn

David G Landon

Osama Sami Haddadin

Ayyoob Dehgani Abbaszadeh

Carl Christensen

Edwin J Hemphill

Richard Ross

Scott C Smedley

Kelly D Griffiths

Thomas R Giallorenzi

Samuel Charles Kingston

Radivoje Zarubica

William K McIntire

L Andrew Gibson

David S Nelson

David W Thorson

Brad Terry Hansen

Anthony D Smith

Daniel G Chilinski

Brian G Yoho

Justin Petersen

Justin C Peterson

David J Moore

Steven O Hadfield

Michael Solonenko

Kristian J Harris

Scott Talbot

A decoding method implemented at a decoder. The method includes determining a current channel realized reliability metric for each symbol in a received sequence of symbols. The current channel realized reliability metrics of the symbols are then sorted to identify a predetermined number of most reliable independent bits in the sequence. A set of one or more bit-flip patterns are then enumerated based on the current channel realized reliability metrics of the predetermined number of the most reliable independent bits in the sequence. The set of bit-flip patterns or a subset thereof are then applied to a received vector corresponding to the sequence of symbols to decode a codeword.

Complexity ordered statistic decoding using improved bit flipping pattern ordering

A variable width barrel shifter. The variable width barrel shifter includes a first barrel shifter configured to receive a data vector of width M as input. The variable width barrel shifter further includes a second barrel shifter configured to receive the data vector of width M as input. The variable width barrel shifter includes an element-wise multiplexer coupled to the first and second barrel shifters. The element-wise multiplexer is configured to provide a shifted output of the data vector of width M by including a first portion of output from the second barrel shifter and a second portion of output from the first barrel shifter.

Variable width barrel shifter

Monitoring rotating machine position using a resolver having an input primary and one or more output secondaries magnetically coupled to the input primary. The method includes exciting the input primary with an exciter input signal, causing a first scaled version of the exciter input signal to appear in a first output secondary. Output from the first output secondary is collected. The collected output from the first output secondary is demodulated to recover gain from the input primary.

Complex baseband rotary resolver

Signal processing to compensate for gain control output spikes caused by steps in a digital step attenuator. A method includes receiving a changing power input signal at a receiver. The method includes determining that a change in power of the input signal will cause a step attenuator to change its attenuation in a step of a predetermined amount. The method further includes based on determining that the change in power of the input signal will cause a digital step attenuator to change its attenuation in a step of a predetermined amount, causing a variable attenuator to change its attenuation by an amount related to the predetermined amount at a time coinciding with a time when the step attenuator changes its attenuation by the predetermined amount. The method further includes outputting a gain-controlled output signal resulting from applying the step attenuator and the variable attenuator to the changing power input signal.

Joint stepped overlapping hysteresis gain control

A method for mitigating interference in a frequency hopping channel system based on codeword metrics obtained during decoding of codewords. The method includes decoding a plurality of codewords using a particular error control coding method. Each of the plurality of codewords includes portions received from plurality of channels in the frequency hopping channel system. For each decoded codeword, one or more codeword metrics are obtained based on the cost of correcting errors during decoding of the plurality of codewords. Based on the codeword metrics, one or more channel metrics are inferred. Based on the inferred one or more channel metrics, a reliability metric of a particular channel is reduced, or incoming symbols received from the particular channel are ignored during decoding.

Frequency hopping interference detection using decoder codeword metrics

Iterative signal processing. At communication hardware, a signal is received from a transmission medium. The signal has characteristics that obscure data or a signal of interest in the signal. The signal is processed at a first signal processor, which is an iterative processor that performs signal processing in cycles whereby successive cycles: improve the performance of processing of the processor itself over previous cycles, or improve the output from the processor. The signal is processed at one or more second signal processors. Extrinsic data, with respect to the first signal processor is produced as a result. The extrinsic data is provided to the first signal processor and used to counter the effects of the data or signal of interest being obscured in the signal, while the first signal processor is intracycle of a first processing cycle.

Partial update sharing in joint LDPC decoding and ancillary processors

A forward error correction (FEC) decoder is configured to find an alignment of a code block in a data stream by attempting to fully or partially decode one or more data windows of a predetermined size in the data stream. The predetermined size is a size of each codeword. The FEC decoder selects a first data window of the predetermined size, attempts to decode the first data window based on a particular error control coding method, and determines whether a valid codeword can be identified by attempting to decode the first data window. In response to determining that a valid codeword can be identified, the FEC decoder determines that an alignment of the codeword with the first data window is found. Otherwise, the FEC decoder selects a second data window of the predetermined size and attempts to decode the second data window.

Alignment detection by full and partial FEC decoding

Synchronizing a pulse position modulation (PPM) signal. A method includes performing a first synchronization operation by receiving a first series of symbols. The symbols in the first series are transmitted with a pulse in a known slot, such that the symbols comprise pulses that are substantially equally spaced in time from adjacent symbols. The first synchronization operation includes identifying when each pulse is received for each of the symbols and using information identifying when each pulse is received for each of the symbols in the first series of symbols to identify symbol and slot boundaries for the pulse position modulation signal. The method further includes performing a second synchronization operation by receiving a second series of symbols transmitted in a known pattern, and identifying the known pattern in the received second series of symbols to identify a frame boundary.

Transport data structure useful for transporting information via a free space optical link using a pulsed laser

One embodiment illustrated herein includes a system for simulating communications in an environment. The system includes a postulated physical environment model, having modeled terrain and continuous changes over time. A channel parameter calculator is coupled to the postulated physical environment model, and configured to obtain samples from the postulated physical environment model, each sample comprising information about modeled terrain at a given time. The channel parameter calculator is further configured to, from the obtained samples, generate communication channel parameters, over time. A channel simulator is coupled to the channel parameter calculator. The channel simulator is configured to be coupled to signal source and to, using the communication channel parameters, apply the communication channel parameters to a communication signal from the signal source to simulate transmission of data through a simulated channel over time.

Real-time calculator for high precision channel simulator effects

Methods and systems adapted for providing forward error correction for data packets containing a relationship between the data in each data packet. Data packets encoded in one error correction coding scheme are received and a second error correction coding scheme is identified based on the relationship between the data in each data packet. The data packets are then decoded using the second error correction coding scheme.

Enhanced decoding of coded sequences with structured data

A permutation apparatus can receive a data block of ordered data elements in parallel data segments that are Pnumber of data elements wide. The permutation apparatus can perform a parallel-to-parallel conversion and one or more reorder operations on the data elements and output the data block in parallel data segments that are Pnumber of data elements wide and in which at least some of the data elements are reordered. The P-parallel-data segments can be clocked into the permutation apparatus on successive cycles of a clock, and the P-parallel-data segments can be clocked out of the permutation apparatus on cycles of the same clock.

Parallel-to-parallel conversion and reordering of a block of data elements

A block of ordered data elements comprising a plurality of sub-blocks each of which is to be processed by a different processing module in segments of the data elements having a particular length characteristic can be received in parallel streams on parallel communication channels. The data elements in each stream can be received and directed to the corresponding processing module. The tail of a segment split between two of the streams and received earlier in time than the corresponding head of the split segment can be buffered until the head is received on the other stream. The head and the tail of the split segment can then be processed as a whole segment in a corresponding processing module.

Combining and processing as a whole portions of a ordered segment of data elements split between two communications channels

The presence of a hidden signal can be detected efficiently using frequency domain multiplication. A detector system can be employed to search for a hidden signal across a wide spectrum in real time. The detector system can divide multiple antenna inputs into a series of blocks and then convert these blocks to the frequency domain possibly in a parallel fashion. Corresponding blocks from each input can then be conjugate multiplied, and the results of this conjugate multiplication can then be averaged over time. If a signal is hidden in the inputs, this averaging will reduce the noise floor thereby revealing the presence of the hidden signal at a particular frequency.

Efficiently detecting presence of a hidden signal using frequency domain multiplication

An LDPC decoder includes a check node processor. The check node processor is configured to implement an n-degree check node, where n is a predetermined number. The degree of a check node is the number of edges coupled to the check node. The LDPC decoder also includes a plurality of n time division multiplexers coupled to the check node processor to couple different edge connection input values to the check node processor at different times so as to allow the check node processor to be time division multiplexed for use in implementing different check nodes with the same check node processor. Each of the multiplexers is configured to provide no more than one edge connection input value to the check node processor at any given time. Each edge connection is used to implement an edge into a check node.

Time shared protograph LDPC decoder

A decoder for decoding received vectors r encoded in accordance with a forward error correction code having a parity check matrix H with multiple regions at least two of which have patterns of ones with different pattern characteristics. The decoder can include a permuted decode module configured to decode in accordance with a permuted version of the parity check matrix H in which the ones in one of the regions are permuted into a permuted pattern that has a pattern characteristic of the other region. The decoder can also include a reorder module that permutes probabilities of a received vector r to be decoded to correspond with the permuted parity check matrix H.

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Erda, UT, United States of America

Ryan W Hinton