Western Digital Technologies, Inc.

Ryan P Mayo

Guoxiao Guo

Yanning Liu

Joey Martin Poss

Charles A Park

Scott A Ottele

Richard Conway

John R Agness

Brian A Johnson

William K Laird

Brian Johnson

Robert P Ryan

Jaesoo Byoun

Shrey Khanna

Henry S Ung

Christopher H Aiello

Nathaniel Dupler

Example circuits, data storage devices, and methods to provide parallel self-servo write in a data storage device are described. The data storage device may include multiple heads actuated over respective surfaces of storage media and at least two preamplifiers and read paths to a channel circuit. Control circuitry may select heads connected through different preamplifiers for parallel self-servo write and receive read signals from the selected heads in parallel. These read signals, which may be based on self-servo write reference spirals previously written to the storage media, may be used to determine respective position error signals for the two heads and control their respective positions with corresponding control signals to a shared voice control motor and respective micro and/or milli actuators on the arms supporting the heads.

Parallel self-servo write circuitry in a data storage device

Example storage preamplifier circuits, data storage devices, and methods for parallel self-servo write are described. The data storage device may include a pair of preamplifier circuits electrically connected to respective banks of read heads actuated over a storage media surfaces. In read/write operation, each preamplifier circuit may selectively and sequentially provide read signals from a selected head to a pair of read channel interfaces. In self-servo write operation, each preamplifier circuit may selectively and in parallel provide read signals from a selected head in their corresponding banks of read heads to the pair of read channel interfaces. For example, the pair of read channel interfaces for two-dimensional magnetic recording may receive read signals from one read sensor in a head in the first bank of heads and another read sensor for another head in the second bank of heads.

Preamplifier circuit for parallel self-servo write

Example control circuitry, data storage devices, and methods for parallel self-servo write in a data storage device are described. The data storage device may include multiple heads actuated over different surfaces of a data storage device and receive read signals from two different heads over two different surfaces in parallel. Position error signals may be determined from each read signal and corresponding position compensation values may be determined for their respective microactuators. Application of these compensation values may maintain their relative positions for parallel writing of servo tracks based on their respective spiral reference patterns and TPI settings.

Parallel self-servo write in a data storage device

A disk drive may include a disk, a head actuated over the disk, a spindle motor comprising a plurality of windings and operable to rotate the disk and coupled to a first and a second spindle driver, the first and the second spindle driver coupled in parallel to the plurality of windings. The disk drive further includes one or more processing devices that are configured to detect a BEMF signal corresponding to a velocity and/or a position of the spindle motor, control, based on detecting the BEMF signal, commutation of the plurality of windings of the spindle motor using the first and the second spindle driver, and wherein the plurality of windings are commutated at or near the same time or in a sequential manner during one or more of a spin up and a spin down routine of the spindle motor.

Enhancing spin up and spin down times for data storage devices

A data storage device or disk drive may include a plurality of regulators, a first voltage rail associated with a first regulator of the plurality of regulators, a second voltage rail associated with a second regulator of the plurality of regulators, wherein a switching frequency of the second regulator is greater than a switching frequency of the first regulator, the first voltage rail is associated with a higher voltage than the second voltage rail, or a combination thereof. The data storage device may include one or more processing devices configured to: determine a minimum switching frequency, identify a start time of a switching cycle for the first regulator, based at least in part on determining the minimum switching frequency; and, at or near the start time of the new switching cycle, couple the first regulator to the second regulator to initiate the switching cycle.

Power improvement for minimum switching frequency operation

A data storage device is disclosed comprising a storage medium, an input configured to receive a supply voltage from a voltage source, and control circuitry powered by the supply voltage. The control circuitry is configured to adjust a load of the data storage device, detect a load voltage at the adjusted load, detect a load current at the adjusted load, process the detected load voltage and the detected load current to detect a current limit of the voltage source, and configure the data storage device in response to the detected current limit of the voltage source.

Data storage device detecting supply current limit

A data storage device is disclosed comprising a first actuator configured to actuate a head over a disk, a second actuator configured to rotate the disk, a first control circuit configured to generate a servo command, and a second control circuit configured to receive the servo command from the first control circuit, control the first actuator or the second actuator using the servo command, and override the servo command to avoid an overcurrent condition.

Data storage device capable of overriding a servo command to avoid an overcurrent condition

A power control module comprising low voltage (LV) port for receiving low supply voltage via LV supply line, high voltage (HV) input port for receiving high supply voltage via HV supply line, wherein high supply voltage is higher than low supply voltage, LV output port for providing low output voltage, HV output port for providing high output voltage, LV node coupled to LV input port, HV node coupled to HV input port, bypass circuit coupled between LV and HV nodes, LV protection circuit coupled between LV node and LV output port, and control circuitry configured to detect power fault on either LV or HV supply line, isolate the LV and HV nodes from LV and HV supply lines, provide backup voltage to LV node, and cause LV protection circuit to regulate backup voltage at LV node to maintain low output voltage at LV output port to within predetermined operating range.

Power control module using protection circuit for regulating backup voltage to power load during power fault

A negative voltage testing including a monitoring and triggering circuit coupled to a supply voltage rail of a device under test (DUT) and a switching circuit coupled to the monitoring and triggering circuit. The monitoring and triggering circuit is configured to cause the switching circuit to provide a first negative voltage to the supply voltage rail when a supply voltage on the supply voltage rail decays below a predetermined level during a first test of the DUT.

Negative voltage testing methodology and tester

A data storage device (DSD) includes a power supply from a host and a charge storage element. A current transient is detected on the power supply from the host and it is determined whether the current transient exceeds a current threshold. When the current transient exceeds the current threshold, power is drawn from the charge storage element to reduce power drawn from the host.

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Irvine, CA, United States of America

Ryan P Mayo