Ocz Technology Group, Inc.

Ocz Storage Solutions Inc.

Bcinet, Inc.

Ccz Technology Group, Inc.

Ryan Maurice Petersen

Franz Michael Schuette

Eric L Nelson

F Michael Schuette

Bhulinder Sethi

Mohasit Monh

Methods and systems for mass storage of data over two or more tiers of mass storage media that include nonvolatile solid-state memory devices, hard disk devices, and optionally volatile memory devices or nonvolatile MRAM in an SDRAM configuration. The mass storage media interface with a host through one or more PCIe lanes on a single printed circuit board.

Mass storage system and method of using hard disk, solid-state media, PCIe edge connector, and raid controller

A system and method for increasing DDR memory bandwidth in DDR SDRAM modules are provided. DDR memory has an inherent feature called the Variable Early Read command, where the read command is issued on CAS latency before the completion of the ongoing data burst and the effect of the CAS latency is minimized in terms of the effect on bandwidth. The system and method optimizes the remaining two access latencies (tand t) for optimal bandwidth.

System and method for increasing DDR memory bandwidth in DDR SDRAM modules

A gaming headset adapted for precise delivery of chemical substances capable of olfactory stimulation, such as odorants, fragrances, pheromones, etc. The headset includes at least one earpiece containing a speaker, a feature for securing the earpiece to the person's head while positioning the speaker over one of the person's ears when the headset is worn, an armature disposed relative to the earpiece so as to extend toward the person's mouth, a microphone located on the armature so as to be located in front of the person's mouth, and a feature supported by and extending along the armature for delivering at least one chemical substance to the person's nostril's when the headset is worn.

Gaming headset with integrated microphone and adapted for olfactory stimulation

The present invention provides a method of increasing DDR memory bandwidth in DDR SDRAM modules. DDR memory has an inherent feature called the Variable Early Read command, where the read command is issued one CAS latency before the termination of an ongoing data burst By using the Variable Early Read command the effect of the CAS latency is minimized in terms of the effect on bandwidth. The enhanced bandwidth technology achieved with this invention optimizes the remaining two access latencies (tand t) for optimal bandwidth. These optimizations in the SPD allow for much better bandwidth in real world applications.

Method of increasing DDR memory bandwidth in DDR SDRAM modules

A method and apparatus for cooling chips on a computer memory module. The apparatus includes a primary and secondary heat spreaders, at least a first heatpipe coupled to the primary heat spreader and having a remote portion spaced apart from the primary heat spreader and thermally contacting the secondary heat spreader, and a coolant within the first heatpipe and the primary heat spreader so as to absorb heat from the primary heat spreader and conduct the heat to the secondary heat spreader. The primary heat spreader has at least two panels configured to engage the memory module therebetween, with facing contact surfaces of the panels adapted for thermal contact with the module chips. The secondary heat spreader is configured to increase surface dissipation of heat from the first heatpipe into the environment. The coolant has a boiling point at or below a maximum preselected operating temperature of the module chips.

Method and apparatus for cooling computer memory

A heat spreader and method for thermal management of a computer memory module by promoting natural convection cooling of the memory module. The heat spreader includes a frame surrounding a planar body adapted to be mounted to a memory module of a computer, and a grid defined in the planar body by a plurality of uniformly distributed perforations. The perforations extend through the planar body to allow natural convention between an interior space beneath the planar body and an exterior space above the planar body.

Method and apparatus for thermal management of computer memory modules

A memory module adapted for installation in an open memory socket on a mainboard of a computer. The memory module includes a substrate with an edge connector comprising pins along an edge of the substrate, and at least one memory package mounted to the substrate and containing a memory die electrically connected to input/output leads located along the perimeter of the memory package and through which data signals are transmitted to and from the memory die. Data signal lines electrically connect a plurality of the input/output leads of the memory package to a plurality of the pins of the edge connector. Termination resistors individually electrically connect each of the data signal lines to ground, a supply voltage, or a reference voltage of the memory package so as to reduce noise and signal reflections through the data signal lines.

Memory module having on-package or on-module termination

A mass storage device having at least one flash memory device and DRAM or SRAM-based cache within a package, and which comprises a co-processor within the package for performing compression and decompression of cached data before writing the cached data to the flash memory device.

On-device data compression to increase speed and capacity of flash memory-based mass storage devices

An apparatus for buffering power transients in a supply power for expansion cards inserted into expansion slots on a computer motherboard. The apparatus comprises a printed circuit board, a connector on the printed circuit board, and at least one capacitor on the printed circuit board. The connector is configured to fit into one of the expansion slots on the motherboard, and comprises at least one power pin and at least one ground pin. The at least one capacitor is connected to the power and ground pins of the connector and has sufficient capacitance to buffer power transients within the supply power to the expansion slots.

Method for increasing stability of system memory through enhanced quality of supply power

A method and apparatus for providing power to a memory array of a computer's memory subsystem, and more particularly power at a level greater than that available through the computer motherboard so as to boost memory performance and operational stability. The apparatus includes a supply device for supplying an input voltage to the memory subsystem at a level that is higher than the power level provided to the memory subsystem by the motherboard. The method entails electrically connecting the supply device to the memory subsystem, and then electrically connecting a power source to the device to deliver the input voltage to the memory subsystem. The additional input voltage supplied to the memory subsystem causes memory chips on memory modules of the memory subsystem to run at higher frequencies, such that the various internal operations of the memory, such as reading and writing, occur more quickly.

Growing community of inventors

San Jose, CA, United States of America

Ryan Maurice Petersen