Micron Technology Incorporated

Ryan Hrinya

Giuseppe Cariello

Fulvio Rori

Chiara Cerafogli

Carmine Miccoli

Justin Bates

Methods, systems, and devices for suspend operations are described. A memory device may perform a write operation including one or more programming phases and one or more verify phases. The memory device may receive a read command while performing the write operation and determine whether the verify phase of the write operation is complete. The memory device may suspend a performance of the write operation in response to determining that the verify phase of the write operation is complete. The memory device may transmit first information for the write operation from a first latch to a volatile memory device in response to suspending the performance of the write operation. The memory device may perform a read operation associated with the read command in response to suspending the performance of the write operation and transferring the first information.

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Boise, ID, United States of America

Ryan Hrinya