Texas Instruments Corporation

Ryan Erik Lind

Lars Risbo

Jasjot Singh Chadha

Reza Sharifi

Ronnie A Bean

Benjamin Matthew McCue

Jinrong Qian

Orlando Lazaro

Wenliang Chen

Huijuan Li

Jairo Daniel Olivares

Byron Mitchell Reed

Zheren Lai

Arun Kumar Sharma

Alexander Lee McHale

Sai Bun Wong

A system for charging a battery includes an adapter, and a charger coupled to receive power from the adapter, and to provide a charging current to the battery. The charger includes a power stage with a charge pump to provide the charging current, and a feedback circuit to provide a feedback signal to the adapter. The power stage can be one of: an adjustable current source with voltage clamp, and an adjustable voltage source with current clamp. The charge pump can be implemented as a voltage divider, so that an input adapter current is multiplied by a pre-defined divider ratio to provide the charging current. The charge pump can be one of: single-phase; and multi-phase.

Battery charger system having a charge pump power stage

In some examples, a converter circuit can be configured to operate in a buck-boost mode. The converter circuit can include a ramp generator that can be configured to generate first and second ramp signals that at least partially overlap respective portions of a buck-boost region during each intermediate clock cycle between clock cycles of a clock signal. By generating the first and second ramp signals during each intermediate clock cycle, first and second drivers can be provided to toggle switches of a power stage, such that an output voltage provided by the power stage can be averaged out over clock cycles of the clock signal to allow for a gradual transition between buck and boost modes of operation of the converter circuit. In some examples, the converter circuit can be configured to operate in a test mode and can be configured to implement trimming of a ramp signal.

Ramp generator for buck/boost converters

Aspects of the disclosure provide for a circuit. In some examples, the circuit includes an amplifier having a first input configured to receive a signal representative of a condition related to a power converter, a second input configured to receive a reference signal, and an output, a PWM regulation circuit having an input coupled to the output of the amplifier, a first output configured to provide a first control signal for a high-side transistor of the power converter, and a second output configured to output a first control signal for a low-side transistor of the power converter, and a PFM regulation circuit having an input coupled to the output of the first amplifier, a first output configured to output a second control signal for the high-side transistor of the power converter, and a second output configured to output a second control signal for the low-side transistor of the power converter.

Common control for multiple power converter operation modes

This disclosure relates to a multiphase converter design with multi-path phase management circuit and output logic. The phase management circuit and output logic can be employed to implement phase adding and shedding operations based on input and output current information and based on control signals for a power stage of the converter. In some examples, the design employs an estimate of an average output current based on a current at an input of the converter for phase control. In additional examples, the design employs cycle-by-cycle current limit and maximum duty-cycle signals to enable phase quickly during load transient. In further examples, the design employs low input and output-current sensed signals for efficient phase shedding and power saving. The design herein improves an overall accuracy of phase adding and shedding, load transient response performance, an operational efficiency and thermal performance of multiphase converter.

Multiphase converter design with multi-path phase management

One example includes a transconductor system. The system includes a first transconductance amplifier that generates a control current in response to a first input voltage. The system also includes a second transconductance amplifier that generates an output signal in response to a second input voltage. The system further includes an intermediate amplifier that generates a control voltage in response to the control current and a third input voltage. The control voltage can be provided to the first and second transconductance amplifiers to set a transconductance of each of the first and second transconductance amplifiers to be approximately equal.

Transconductor system for a power supply system

Transconductor systems

A system includes a class D amplifier and a current steering digital-to-analog converter (DAC) directly connected to the class D amplifier. The system also includes a common mode servo circuit coupled to a node interconnecting the current steering DAC to the class D amplifier. The common servo circuit amplifies a difference between a common mode signal determined from the node and a reference voltage and generates a feedback current to the node based on the amplified difference. A feed-forward common-mode compensation circuit is included to reduce an alternating current (AC) ripple from the class D amplifier. The feed-forward common-mode compensation circuit includes first and second resistors coupled to respective outputs of the class D amplifier. A current mirror is coupled to the first and second resistors and is configured to sink a current from the node to ground that approximates a common mode feedback current of the class D amplifier.

Direct current mode digital-to-analog converter to class D amplifier

An apparatus is provided. The apparatus includes an amplifier, differential amplifiers, and FETs. The amplifier has an intermediate node and an output node, and the amplifier is adapted to receive an audio signal. Each differential amplifier amplifies the difference between an output voltage from the output node with a reference voltages. The FETs are coupled in series with one another between a first and a second voltage, and each FET receives an output from at least one of the differential amplifiers. Additionally, the intermediate node is coupled to a node between at least two FETs.

Feedback controlled power limiting for signal amplifiers

An amplifier apparatus includes: (a) an integrator having an input for receiving an input signal, and integrating the input signal to present an integrated signal; (b) a first comparer coupled with the integrator for comparing the integrated signal with a varying reference signal to produce an output signal; and (c) a feedback circuit, coupled to receive the integrated signal and coupled with the input structure, that includes: (1) a second comparer coupled for receiving the integrated signal and comparing the integrated signal with a reference level related to the reference signal; the second comparer presents an actuating signal when the integrated signal has a predetermined relationship with the reference level; and (2) a switch coupled with the second comparer unit and with the input and responding to the actuating signal to affect the input signal appropriately to reduce the integrated signal when the actuating signal is at a predetermined level.

Amplifier apparatus

An audio preamplifier () based on an operational transconductance amplifier, in combination with a class D audio output amplifier () is disclosed. The input signal is coupled to the preamplifier () through a capacitor () in series with a resistor () that sets the transconductance of the preamplifier. The preamplifier () includes a differential operational amplifier () that drives output MOS transistors (), which are biased by current sources (). Feedback from the drain nodes of the output MOS transistors () to the inputs of the differential operational amplifier (), along with the series capacitor () and resistor () input coupling, ensures minimum offset voltage and current at the output of the preamplifier (). Common mode feedback control amplifiers () ensure proper bias of the components into the saturation region.

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Knoxville, TN, United States of America

Ryan Erik Lind