Intel Corporation

Intel Corporatiion

Ryan E Arch

Jack T Kavalieros

Van H Le

Benjamin Chu-Kung

Robert S Chau

Gilbert W Dewey

Ravi Pillarisetty

Marko Radosavljevic

Brian S Doyle

Niloy Mukherjee

Rafael Rios

Uday Shah

Prashant Majhi

Kaan Oguz

Elijah V Karpov

Ashish Agrawal

Markus Kuhn

Justin Brockman

Marc C French

Kent Millard

Huiying Liu

Tahir Ghani

Matthew V Metz

Abhishek A Sharma

Seung Hoon Sung

Christopher J Jezewski

Miriam Ruth Reshotko

Lawrence D Wong

Arnab Sen Gupta

Ande Kitamura

Embodiments of the invention include non-planar InGaZnO (IGZO) transistors and methods of forming such devices. In an embodiment, the IGZO transistor may include a substrate and source and drain regions formed over the substrate. According to an embodiment, an IGZO layer may be formed above the substrate and may be electrically coupled to the source region and the drain region. Further embodiments include a gate electrode that is separated from the IGZO layer by a gate dielectric. In an embodiment, the gate dielectric contacts more than one surface of the IGZO layer. In one embodiment, the IGZO transistor is a finfet transistor. In another embodiment the IGZO transistor is a nanowire or a nanoribbon transistor. Embodiments of the invention may also include a non-planar IGZO transistor that is formed in the back end of line stack (BEOL) of an integrated circuit chip.

Fabrication of non-planar IGZO devices for improved electrostatics

Embodiments herein describe techniques for a semiconductor device including a substrate and a transistor above the substrate. The transistor includes a channel layer above the substrate, a conductive contact stack above the substrate and in contact with the channel layer, and a gate electrode separated from the channel layer by a gate dielectric layer. The conductive contact stack may be a drain electrode or a source electrode. In detail, the conductive contact stack includes at least a metal layer, and at least a metal sealant layer to reduce hydrogen diffused into the channel layer through the conductive contact stack. Other embodiments may be described and/or claimed.

Contact stacks to reduce hydrogen in thin film transistor

Resistive memory cells, precursors thereof, and methods of making resistive memory cells are described. In some embodiments, the resistive memory cells are formed from a resistive memory precursor that includes a switching layer precursor containing a plurality of oxygen vacancies that are present in a controlled distribution therein, optionally without the use of an oxygen exchange layer. In these or other embodiments, the resistive memory precursors described may include a second electrode formed on a switching layer precursor, wherein the second electrode is includes a second electrode material that is conductive but which does not substantially react with oxygen. Devices including resistive memory cells are also described.

Resistive memory cells and precursors thereof, methods of making the same, and devices including the same

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Hillsboro, OR, United States of America

Ryan E Arch