Siemens Aktiengesellschaft

Russell D Homer

Helmut Brazdrum

Gerhard Renz

Renate Mattis

Heinrich Belhack

Guenther Seidel

The units (CTR , CTR ) are controlled by mutually independent clock pulses (SCLK, RXCK). In order to prevent the loss of microsynchronization when information is transferred from one clock system to the other and as a result of different error situations as regards the information received by the units, the information received is temporarily stored before being passed on for processing or the result information is temporarily stored before being transmitted. If reception is error free, the units are cross-synchronized. In the absence of a synchronization signal in one partner unit owing to faulty reception, this unit rejects the information received despite the fact that it is error free.

Process for maintaining the microsynchronous operation of double information-processing units

For implementing the method for reading error statistics data, a hardware configuration has processing units (CTR,CTR,) that operated in microsynchronous parallel operation for the processing of ATM information. The processing units are connected at the ATM end to a switching matrix (SN,SN,) and via a bus interface (B-I) to a central processor. The central processor is used for evaluating error statistics arising in the processing units and for monitoring the synchronous operation by comparing the processing results. The error statistics data is packed into ATM transmitter cells and looped back via the switching matrix in each case to both processing units and then supplied to the central processor via the bus interface. This prevents the erroneous indication of the loss of microsynchronism when error statistics for the two processing units differ.

Process for fetching out error statistics data

A concentrator equipped with two processors is connected via two corresponding channel systems to a higher ranking exchange. Both processors operate independently of each other and poll all subscriber line circuits for switching codes. In the event that a channel system malfunctions, but the concentrator processor is operational, one processor transmits request signals, as well as an emergency operating state signal, to the subscriber line circuits. If the processor itself malfunctions, it transmits request signals and, in addition, an out-of-order state signal. The emergency operating signal and out-of-order signal are stored by each of the subscriber line circuits. Switching codes are transmitted to each of the two processors when both of these processors are in standard operating mode or in emergency mode. If one of the processors is in emergency mode and the other in standard operating mode, or one of them malfunctions and is in out-of-order mode and the other is in emergency mode, the switching code is transmitted only to the latter processor in each case.

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Munich, Germany

Russell D Homer