Motorola Corporation

Ruoping Wang

Warren D Grobman

Alfred J Reich

James Lee Clingan, Jr

A method and apparatus for making an integrated circuit takes advantage of both polarized and phase shifted light in order to achieve a fine feature. The feature on the integrated circuit is obtained by exposing a first region to light that has a first polarization state, exposing a second portion of the wafer to polarized light in the first polarization state but which is also phase shifted about 180 degrees. A region between the first and second region may be unexposed to light. The region between the first and the second region is the position of the fine feature. In areas where the first region and the second region need to be joined together but no feature is intended to be formed, there is a third region between the first and second regions which is exposed to polarized light that has a second polarization state which is orthogonal to that of the polarized light which exposes the first and second regions. The result is that the boundary between either the first or second region and the third region is fully exposed. Thus there is no artifact or extra feature formed in this boundary area between the first and second regions. Masks are made with corresponding regions to the first, second, and third regions so that the light in these polarized and phase shifted states is properly provided to the integrated circuit.

Method and apparatus for making an integrated circuit using polarization properties of light

A method of patterning a wafer using four areas with differing exposure characteristics is disclosed. Two areas are phase shifted relative to the other two areas in order to create unexposed areas on the integrated circuit. Two different areas have polarizations orthogonal to each other, are frequency shifted relative to the two other areas, or are exposed by light at a time different than the two other areas to form exposed areas on the integrated circuit. The exposed areas are subsequently removed from the integrated circuit. In one embodiment, the four areas are on the same mask. The use of four areas with differing exposure characteristics allows for the patterning of more complicated and smaller geometric patterns on the integrated circuit than traditional patterning methods.

Growing community of inventors

Austin, TX, United States of America

Ruoping Wang