Taiwan Semiconductor Manufacturing Comp. Ltd.

Rung-Shiang Chen

Ching-Juinn Huang

Chih-Chun Hsu

Chuan-Fang Su

Hsing-Wang Chen

Some embodiments of the present disclosure provide an integrated circuit (IC) design method. The method includes (1) receiving a first layout comprising stripe patterns with a first separation and a first width; (2) receiving a second layout comprising stripe patterns with a second width narrower than the first separation, each stripe on the second layout is configured to situate between two adjacent stripes on the first layout when overlaying the first layout and the second layout; (3) performing a separation check by identifying a spacing between a stripe on the second layout and one of the two adjacent stripes on the first layout; and (4) adjusting the spacing between the stripe on the second layout and one of the two adjacent stripes on the first layout when the separation check determining the spacing is greater than a predetermined value.

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Tainan, Taiwan

Rung-Shiang Chen