Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Boe Technology Groupco., Ltd.

Ruifang Du

Xiaoye Ma

Rui Ma

Xiaofang Gu

Donghui Zhang

Guodong Liu

Haijiao Qian

Zijun Cao

Xianjie Shao

Yuanyuan Liu

Xiping Wang

Hui Li

Xibin Shao

Min Wang

Tong Yang

Hui Guo

Chengshao Yang

Ran Zhang

Haifeng Liu

Huan Ni

Chengyong Zhan

Zhenyu Han

Wenwu Lu

Ruiying Yang

Yanlong Li

Ya Yu

Huanhuan Huang

Yuxiang Zhang

Ting Wan

Lingjuan Liu

Na Sui

Yong Qi

Jiyan Ma

Fengzhen Lyu

Lanzhou Ma

The present disclosure provides a liquid crystal writing board and a method for repairing the same. The liquid crystal writing board includes a first substrate, a second substrate, and a bistable liquid crystal layer disposed between the first substrate and the second substrate. The first substrate includes a plurality of first signal line groups, the first signal line group including at least two first signal lines; a plurality of second signal lines, the first signal lines and the second signal lines intersecting with each other; and a control electrode disposed in an area surrounded by two adjacent first signal lines and two adjacent second signal lines, the first signal lines and the second signal lines being configured to jointly provide control signals to the control electrode. The first signal lines in the first signal line group are electrically connected with each other.

Liquid crystal writing board and method for repairing the same

The present disclosure provides a display substrate and a display device. The display substrate comprises: a display area and a frame area located at the periphery of the display area, wherein the frame area comprises a frame sealant arrangement area, and the frame sealant arrangement area comprises a corner area; the display substrate further comprising: an organic film layer, wherein the organic film layer comprises an annular groove and at least one arc-shaped groove, the annular groove surrounds the display area, and the annular groove is located in the frame sealant arrangement area; the arc-shaped groove is located in the corner area.

Display substrate and display device

A display baseplate includes a display region and a peripheral region, and the display baseplate includes: a substrate, and a gate line driving circuit, a plurality of signal lines, and a gate line provided on one side of the substrate, the gate line driving circuit and the plurality of signal lines all being located in the peripheral region, and the gate line being located in the display region. The gate line driving circuit is respectively connected to the plurality of signal lines and the gate line, and includes a plurality of stages of driving units that are cascaded to each other, each driving unit includes a first element group, and the first element group includes at least one first electronic element. The plurality of signal lines are arranged in a first direction, the first direction is an extending direction of the gate line.

Display baseplate, display panel, and display apparatus

Provided is an array substrate. The array substrate us provided with a display region and a non-display region on a periphery of the display region, and includes: a base substrate; a pixel electrode and a thin-film transistor on a side of the base substrate, wherein the pixel electrode and the thin-film transistor are disposed in the display region, and the pixel electrode is disposed on a side, facing away from the base substrate, of the thin-film transistor; a first passivation layer between the pixel electrode and the thin-film transistor, wherein a plurality of first vias are defined in the first passivation layer; and a second passivation layer on a side, facing away from the base substrate, of the pixel electrode, wherein a plurality of second vias are defined in the second passivation layer.

Array substrate and method for manufacturing same, and liquid crystal panel

A display substrate and a display device are disclosed. The display substrate includes a base substrate and a plurality of shift register units; each of the plurality of shift register units includes an input circuit, an output circuit, a first reset circuit and a frame reset signal connection wire; the frame reset signal connection wire and is configured to provide a frame reset signal to the first reset circuit; the first reset circuit is configured to respond to the frame reset signal, so as to reset a first node and an output end within a time period between two display frames of the display substrate; the first reset circuit includes a first transistor and a second transistor, and the frame reset signal connection wire, a gate of the first transistor and a gate of the second transistor are provided on a first conductive layer.

Disclosed are a gate driving circuit and a display device. According to the gate driving circuit, in every five adjacent shift registers, the output control end of the first shift register is electrically connected to the input signal end of the fifth shift register; in every six adjacent shift registers, the output control end of the sixth shift register is electrically connected to the reset signal end of the first shift register. In the gate driving circuit of a cascade structure provided by the present disclosure, there are fewer cascade signal lines, thereby saving space, further implementing the narrow bezel of a display device; in addition, for the gate driving circuit of a cascade structure provided by the present disclosure, the signal provided by an external circuit board can be more flexible, even if a display product is manufactured, the pulse width of a clock signal can be adjusted by means of the external circuit board, thereby adjusting the high-level width of a gate signal output by a gate signal output end, and the flexibility is high.

Gate driving circuit and display device

A shift register includes an input sub-circuit, a first noise reduction sub-circuit, and a first pull-down sub-circuit. The first noise reduction sub-circuit is coupled to the pull-up node, the first pull-down node and a first voltage signal terminal, and is configured to transmit a first voltage signal to the pull-up node under control of the first pull-down node; the input sub-circuit is coupled to the pull-up node and a signal input terminal, and is configured to transmit an input signal to the pull-up node in response to the input signal; the first pull-down sub-circuit is coupled to the signal input terminal, the first pull-down node and the first voltage signal terminal, and is configured to transmit the first voltage signal to the first pull-down node in response to the input signal, so that the first noise reduction sub-circuit stops transmitting the first voltage signal to the pull-up node.

Shift register, gate drive circuit and drive method thereof

The present disclosure provides a GOA circuit, an array substrate and a display device, wherein the GOA circuit comprises: a GOA area, and the GOA area comprises a plurality of GOA unit circuits cascaded with each other; a lead area, wherein at least one STV signal line and at least one non-STV signal line are arranged in the lead area, each STV signal line and each non-STV signal line is connected to at least one GOA unit circuit, and the non-STV signal line comprises at least one of a Vdd signal line, a Clk signal line, a VGH signal line and a VGL signal line; a projection of the at least one STV signal line on the lead area does not overlap a projection of the at least one non-STV signal line on the lead area.

GOA circuit, array substrate and display device

The present disclosure provides a display substrate and a display device. The display substrate includes a common electrode. The common electrode includes an electrode unit array. The electrode unit array includes a plurality of electrode units. Each of the electrode units corresponds to two adjacent sub-pixels. Each of the electrode units includes a boundary electrode line and an inner region defined by the boundary electrode line. The inner region includes a first region and a second region. The first region includes a plurality of first strip electrode lines having a same longitudinal direction. Two adjacent first strip electrode lines are not connected inside the first region. The second region includes a plurality of second strip electrode lines having a same longitudinal direction. Two adjacent second strip electrode lines are not connected inside the second region.

The present disclosure relates to a display substrate, a method for driving the same, and a display panel. The display substrate includes a base substrate as well as gate lines, data lines and a gate driver on the base substrate, the gate line being connected to the gate driver, and electrostatic rings and control components corresponding to at least one gate line are further disposed on the base substrate, each of the gate lines being connected to the electrostatic ring by a corresponding control component. The electrostatic ring is configured to load a control voltage to turn on the corresponding control component after the display panel is turned off, and the corresponding control component is configured to be turned on to change a voltage on the gate line into a turn-on voltage after the display panel is turned off.

Display substrate having electrostatic ring and control component

A display device and driving method thereof and a manufacturing method of a display substrate involve an array substrate and manufacturing method thereof. The array substrate includes: a base substrate; and a number of display sub-pixels arranged in a matrix on the base substrate. Each individual display sub-pixel includes: a pixel electrode; a first common electrode; and a second common electrode; wherein the first common electrode and the second common electrode are insulated from each other; and wherein the pixel electrode is configured to interact respectively with the first common electrode and the second common electrode so as to conduct one or more display operations.

Array substrate and manufacturing method thereof, display device and driving method thereof and manufacturing method of display substrate

Embodiments of the present disclosure provide a shift register, a gate driving circuit, and a display apparatus. The shift register comprises a power consumption-reducing sub-circuit and an output sub-circuit; wherein: the power consumption-reducing sub-circuit is connected to a clock signal terminal, a control terminal, and the output sub-circuit, the power consumption-reducing sub-circuit is used to output a signal of the clock signal terminal to the output sub-circuit under the control of the control terminal; the output sub-circuit is connected to the clock signal terminal through the power consumption-reducing sub-circuit and is also connected to an output terminal and a pull-up node, the output sub-circuit is used to output an output signal of the power consumption-reducing sub-circuit to the output terminal under the control of the pull-up node.

Shift register, gate driving circuit, and display apparatus

A display substrate includes an active area; and a gate-driver-on-array (GOA) circuit area, wherein the active area includes a display pixel area and a dummy pixel area located in the periphery of the display pixel area, and wherein the GOA circuit area includes at least one dummy GOA circuit having an output terminal connected to a pixel electrode of at least one dummy pixel.

Display substrate and manufacturing method thereof

The present disclosure provides a drift control circuit, a drift control method, a gate driving unit, a gate driving method and a display device. The drift control circuit includes: a first drift control sub-circuit configured to, during noise releasing performed by the first pull-down module, control first electrodes of pull-down transistors included in the second pull-down module to be coupled to a first control voltage terminal, which is configured to input a first voltage to the first pull-down module during noise releasing performed by the first pull-down module; and a second drift control sub-circuit configured to, during noise releasing performed by the second pull-down module, control first electrodes of pull-down transistors included in the first pull-down module to be coupled to a second control voltage terminal, which is configured to input the first voltage to the second pull-down module during noise releasing performed by the second pull-down module.

Growing community of inventors

Beijing, China

Ruifang Du