Boe Technology Group Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

International Business Machines Corporation

Hefei Boe Optoelectronics Technology Co., Ltd.

Intel Corporation

Beijing Boe Technology Development Co., Ltd.

Chinese Academy of Agricultural Sciences

Other

Zte Corporation

Juniper Networks, Inc.

Tsinghua University

Lenovo (beijing) Limited

Beijing University of Technology

Beijing University of Chemical Tehcnology

Shenzhen Yinwang Intelligent Technologies Co., Ltd.

Rui Ma

Xiaoye Ma

Ming Hu

Ruifang Du

Xianjie Shao

Zhong Su

Tong Yang

Jian Ye Chen

Min Wang

Yuanyuan Liu

Xibin Shao

Zuquan Hu

Xiao Xun Zhang

Hui Zhu

Keke Cai

Fengzhen Lv

Zhangtao Wang

Jianjun Wang

Lei Wang

Feng Qu

Jing Cheng

Fei Wang

Tao Song

Sheng Hua Bao

Lan Xie

Wei Li

Mark T Bohr

Jian Li

Yang Zhang

Rishabh Mehandru

Wei Zhao

Bin Yu

Yuan Wang

William Scott Spangler

Wei Hu

Tongshang Su

Qi Wang

Ming Lei

Rui Li

Guangyao Li

Mark Armstrong

Yingbin Hu

Zhongda Du

Tingting Zhao

Frank Patrick O'Mahony

Wanli Xing

Hongjun Wang

Hong Yang

WeiFeng Zhang

Wei Gao

Haifeng Liu

Zhizhong Tu

Guolei Wang

Xiaofang Gu

Bin Yao

Xiping Wang

Huiying Luo

Yaru Wang

Huoqing Huang

Yingguo Bai

Yongcan Wang

Ayan Kar

Kalyan C Kolluru

Qiuyi Yu

Nicholas A Thomson

Xiaoyun Su

Peilong Yang

Xian Wu

Shenghua Bao

Xia Shi

Kun Meng

XiYuan Yin

Quan Gan

Ben Fei

Zijun Cao

Li Yin

Wei Xia

Yongxian Xie

Bin Huang

Huan Ni

Nathan D Jack

Jun Hu

Jianye Zhang

Donghui Zhang

Chao Han

Zixuan Wang

Wenhao Wang

Tao Tu

Akm A Ahsan

Anil Kumar Bollineni

Wenwu Lu

Cheng Lu

Dianqing Li

Yanchun Lu

Zhongfeng Yang

Juguang Huang

Ruiyan Shi

Luqi Huang

Jianlan Li

Juan Guo

A phase shifting device, an antenna unit and abase station are disclosed. According to an embodiment, the phase shifting device comprises a power divider and a phase shifter. The power divider comprises an input inlet for an input signal, a first output outlet connected with an impedance member having a system impedance, and a second output outlet connected with the phase shifter. The phase shifter comprises a first plate and a second plate slidable relative to the first plate. Two parallel microstrip lines are provided on a first surface of the first plate. An adjusting member is provided on a second surface of the second plate that faces to the first surface of the first plate. The adjusting member is configured to adjust a length of a total signal transmission path that is from one to the other of the two parallel microstrip lines via an intermediate signal transmission path introduced by the adjusting member, or to prohibit the input signal from transmitting to the second output outlet, according to a position of the second plate relative to the first plate when the second plate slides relative to the first plate.

Phase shifting device with slidable plate for signal transmission path length adjustment, usable in an antenna unit or base station

Provided are amonoterpene synthase BbTPS3 and related biological materials thereof and use thereof. BbTPS3 is: A1) a protein having the amino acid sequence shown in SEQ ID NO: 2; A2) a fusion protein obtained by linking protein-tags at the N-terminus or/and the C-terminus of the protein shown in SEQ ID NO: 2; and A3) a protein having at least 90% identity and the same function as the protein shown in A1), which is obtained by performing substitution and/or deletion and/or addition of one or more amino acid residues on the amino acid sequence shown in SEQ ID NO: 2. BbTPS3 can catalyze GPP to form l-borneol, and can be used to regulate and produce plant monoterpene compounds and cultivate(L.) DC.

Blumea balsamifera monoterpene synthase BBTPS3 and related biological materials thereof and use thereof

A display substrate has a display area and an encapsulation area around the display area. The display substrate includes a substrate and a spacer layer. The spacer layer is located on a side of the substrate, and includes a plurality of first columnar spacers located in the encapsulation area and distributed at intervals around the display area, and bottom ends of the plurality of first columnar spacers are fixedly disposed on the substrate. Ends of the plurality of first columnar spacers proximate to the substrate are the bottom ends thereof, and ends of the plurality of first columnar spacers away from the substrate are top ends thereof.

Display substrate and manufacturing method therefor, and display device

The present application discloses a method and apparatus for processing a notification trigger message, which method and apparatus relate to the technical field of computers. One specific implementation of the method comprises: receiving a notification trigger message formed by triggering a notification, wherein the notification trigger message includes an identifier of a current push message corresponding to the notification; determining whether the identifier of the current push message exists in a message cache, and if the identifier of the current push message exists in a message cache, ignoring the notification trigger message, wherein the message cache is used for storing an identifier of a push message corresponding to a notification that has been responded to. The implementation can avoid multiple responses of a client to an identical notification.

Method and apparatus for processing notification trigger message

A display substrate and a display device are disclosed. The display substrate includes a base substrate and a plurality of shift register units; each of the plurality of shift register units includes an input circuit, an output circuit, a first reset circuit and a frame reset signal connection wire; the frame reset signal connection wire and is configured to provide a frame reset signal to the first reset circuit; the first reset circuit is configured to respond to the frame reset signal, so as to reset a first node and an output end within a time period between two display frames of the display substrate; the first reset circuit includes a first transistor and a second transistor, and the frame reset signal connection wire, a gate of the first transistor and a gate of the second transistor are provided on a first conductive layer.

Display substrate and display device

Disclosed is a display panel including: first spacer on the array substrate, an orthographic projection of the first spacer on the array substrate being a first pattern extending along a first direction; a second spacer on the counter substrate, an orthographic projection of the second spacer on the array substrate being a second pattern extending along a second direction; at least two third spacers, orthographic projections of which on the array substrate being respectively on two sides of the first pattern along the first direction; at least two fourth spacers, orthographic projections of which on the array substrate being respectively on two sides of the second pattern along the second direction; one of the third spacer and the fourth spacer is on the array substrate, and the other is on the counter substrate.

Display panel and display device

Disclosed are a gate driving circuit and a display device. According to the gate driving circuit, in every five adjacent shift registers, the output control end of the first shift register is electrically connected to the input signal end of the fifth shift register; in every six adjacent shift registers, the output control end of the sixth shift register is electrically connected to the reset signal end of the first shift register. In the gate driving circuit of a cascade structure provided by the present disclosure, there are fewer cascade signal lines, thereby saving space, further implementing the narrow bezel of a display device; in addition, for the gate driving circuit of a cascade structure provided by the present disclosure, the signal provided by an external circuit board can be more flexible, even if a display product is manufactured, the pulse width of a clock signal can be adjusted by means of the external circuit board, thereby adjusting the high-level width of a gate signal output by a gate signal output end, and the flexibility is high.

Gate driving circuit and display device

A shift register includes an input sub-circuit, a first noise reduction sub-circuit, and a first pull-down sub-circuit. The first noise reduction sub-circuit is coupled to the pull-up node, the first pull-down node and a first voltage signal terminal, and is configured to transmit a first voltage signal to the pull-up node under control of the first pull-down node; the input sub-circuit is coupled to the pull-up node and a signal input terminal, and is configured to transmit an input signal to the pull-up node in response to the input signal; the first pull-down sub-circuit is coupled to the signal input terminal, the first pull-down node and the first voltage signal terminal, and is configured to transmit the first voltage signal to the first pull-down node in response to the input signal, so that the first noise reduction sub-circuit stops transmitting the first voltage signal to the pull-up node.

Shift register, gate drive circuit and drive method thereof

Embodiments of the present disclosure provide a display panel, a preparing method, and a display device. The display panel includes: a color film substrate and an array substrate opposite to the color film substrate. The color film substrate includes: an opposite substrate, a color resistance layer on the opposite substrate and a plurality of support structures on a side, away from the opposite substrate, of the color resistance layer at intervals. The array substrate includes: a base substrate and a plurality of auxiliary structures on a side, facing the opposite substrate, of the base substrate at intervals. At least one auxiliary structure of the plurality of auxiliary structures correspondingly contacts with at least one support structure of the plurality of support structures.

Display panel, preparing method, and display device

A high-speed real-time data transmission method includes performing deduplication processing on first encoded data from a transmission device to obtain target data. The first encoded data is obtained by encoding corresponding data using a first encoding algorithm. The method further includes encoding the target data using a second encoding algorithm to obtain second encoded data, and sending the second encoded data to a receiving device. A compression ratio of the second encoding algorithm is greater than a compression ratio of the first encoding algorithm.

High-speed real-time data transmission method and apparatus, device, and storage medium

Disclosed herein are integrated circuit (IC) structures including backside vias, as well as related methods and devices. In some embodiments, an IC structure may include: a device layer, wherein the device layer includes a plurality of active devices; a first metallization layer over the device layer, wherein the first metallization layer includes a first conductive pathway in conductive contact with at least one of the active devices in the device layer; a second metallization layer under the device layer, wherein the second metallization layer includes a second conductive pathway; and a conductive via in the device layer, wherein the conductive via is in conductive contact with at least one of the active devices in the device layer and also in conductive contact with the second conductive pathway.

Integrated circuit structures including backside vias

A pressing device includes a screw body. The screw body includes a screw head that comprises a driver interface. The screw body also includes a screw shaft that comprises a screw tip opposite the screw head with respect to the screw shaft, exterior spiral threads between the screw head and screw tip, and an interior cavity with an opening at the screw tip. The pressing device also includes a pin partially inserted into the interior cavity. The pin comprises a first pin end inserted into the interior cavity, a pin shaft that is connected to the first pin end, and a second pin end that is connected to the pin shaft and that is exterior to the interior cavity. Applying a force to the second pin end in a direction towards the screw head causes the pin shaft to advance into to interior cavity.

Configurable printed-circuit-board-assembly component pressing fixture

Provided by the present invention is a picture focusing method, comprising: acquiring a video picture, and, according to an instruction command, determining a target object in the video picture; determining picture depth information of a video picture region in which the target object is located; acquiring parameter information of a camera corresponding to multiple video picture frames; using the picture depth information of the video picture region and the parameter information of the camera as the input of a preset focusing neural network model; and using focus adjustment information of the camera to perform a focus adjustment operation on the camera.

Picture focusing method, apparatus, terminal, and corresponding storage medium

The present disclosure provides a shift register, a gate driving circuit and a display panel, and belongs to the field of display technology. The shift register of the present disclosure includes: an input circuit configured to precharge and reset a pull-up node; one pull-down control circuit being electrically connected to one pull-down circuit through a pull-down node; the pull-down control circuit being configured to control a potential at the pull-down node under a first power voltage; each pull-down circuit being configured to pull down the potential at the pull-down node in response to a potential at the pull-up node; an output circuit configured to output a clock signal through a signal output terminal in response to the potential at the pull-up node; one first noise reduction circuit connected to one pull-down node.

Shift register, gate driving circuit and display panel

Growing community of inventors

Beijing, China

Rui Ma