U.S. Philips Corporation

Broadcom Corporation

Other

Koninklijke Philips Corporation N.v.

Rudy J Van De Plassche

Eise Carel Dijkmans

Klaas Bult

Jan Mulder

Pieter Vorenkamp

Arnoldus Venes

Jan Roelof Westra

Gerardus C M Gielis

Chi-Hung Lin

Christopher Michael Ward

Alphons A M L Bruekers

Franciscus Maria Leonardus Van Der Goes

Marcel Lugthart

Pieter P Vorenkamp

Arnoldus G Venes

Eduard Ferdinand Stikvoort

Adrianus Sempel

Robert E Van De Grift

Petrus G Baltus

Hendrikus J Schouwenaars

Gerardus C Gielis

Adrianus W M Van Den Enden

Petrus J Van Lieshout

Laurent Le Pailleur

Arie J Leeuwenburgh

Arnoldus G W Venes

Antonius C Schepens

Arnoldus Gerardus Wilhelmus Venes

An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Variable gain amplifier for low voltage applications

A transceiver front-end provides an interface between a transmission medium and transmitter, and between a transmission medium and receiver. The transceiver front-end includes a hybrid circuit, a high-pass filter, and a gain stage, that permits the reduction or the complete elimination of buffer amplifiers. Buffer amplifiers can be eliminated because the hybrid circuit and/or the high-pass filter are adapted so that they can be directly connected to each other, without a loss in circuit performance. Furthermore, the high-pass filter and/or the gain stage are also adapted so they can be directly connected. As such, the transceiver front-end can be constructed using all passive components, reducing or eliminating excess heat generation.

Hybrid circuit for a transceiver front-end

In a latch circuit having a bistable pair of cross connected transistors of a first polarity and a third transistor of a second polarity, a current signal greater than a bias current is received at a latch circuit port, amplified with the third transistor, and applied to the latch circuit port. This decreases the time in which the latch circuit port receiving the current signal greater than the bias current reaches a steady state voltage.

High speed latch comparators

Transceiver front-end

An N-bit analog to digital converter includes a reference ladder, a track-and-hold amplifier connected to an input voltage, a coarse ADC amplifier connected to a coarse capacitor at its input and having a coarse ADC reset switch controlled by a first clock phase of a two-phase clock, a fine ADC amplifier connected to a fine capacitor at its input and having a fine ADC reset switch controlled by a second clock phase of the two-phase clock, a switch matrix that selects a voltage subrange from the reference ladder for use by the fine ADC amplifier based on an output of the coarse ADC amplifier, and wherein the coarse capacitor is charged to a coarse reference ladder voltage during the first clock phase and connected to the T/H output during the second clock phase, wherein the fine capacitor is connected to a voltage subrange during the first clock phase and to the T/H output during the second clock phase, and an encoder that converts outputs of the coarse and fine ADC amplifiers to an N-bit output.

Subranging analog to digital converter with multi-phase clock timing

In a receiver, a tuner (TUN) converts a reception signal (Srf) to an intermediate-frequency signal (Sif). An adjustable frequency converter (AFRC) converts the intermediate-frequency signal (Sif) to an input signal (Sin) for a filter arrangement (FIL) which is capable of providing various frequency responses (Hfil , Hfil ) associated with different transmission standards. The adjustable frequency converter (AFRC) and the filter arrangement (FIL) may form part of an integrated receiver-circuit (IRC) suitable for many different transmission standards. The tuner (TUN) may provide the intermediate-frequency signal (Sif) at any one of various different intermediate frequencies (IF , IF ). For any intermediate frequency (IF ,IF ), the adjustable frequency converter (AFRC) can be adjusted in such a way that the filter arrangement (FIL) receives the input signal (Sin) in a frequency range (FR) which is suitably located with respect to its frequency responses (Hfil , Hfil ). Thus, the adjustable frequency converter (AFRC) allows the use of any one of various different intermediate frequencies and, therefore, allows the use of relatively cheap standard-specific tuners. Thus, it allows relatively cost-efficient implementations.

Multi-standard reception

An input circuit for, for example, an A/D converter mainly determines the performance of the circuit preceded by the input circuit (A/D converter). To improve the performance of the input circuit and to overcome the problem of high-power dissipation at the same time, the invention proposes the use of a combined sampling means and sub-ranging means as an input circuit.

Combined input circuit for analog to digital conversion

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Eindhoven, Netherlands

Rudy J Van De Plassche