Smart Storage Systems, Inc.

Telco Testing Systems LLC

Smart Modular Technologies (az) , Inc.

Rudolph J Sterbenz

Robert W Ellis

Kevin L Kilzer

James E Hopkins

Michael Peter Costello

Roger Brueckner

Disclosed are techniques for flash memory management, including receiving data from a host, writing the data to a flash memory device in the order it was received from the host, and providing at least one data structure configured to locate the data written to the flash memory device.

Flash management using sequential techniques

A method for flash memory management comprises providing a head pointer configured to define a first location in a flash memory, and a tail pointer configured to define a second location in a flash memory. The head pointer and tail pointer define a payload data area. Payload data is received from a host, and written to the flash memory in the order it was received. The head pointer and tail pointer are updated such that the payload data area moves in a circular manner within the flash memory.

Circular wear leveling

Disclosed are techniques for flash memory management, including storing metadata and/or error correcting information separately from payload data. In various embodiments, metadata and/or error correcting information are stored in a random access memory within a solid state drive.

Flash management using separate metadata storage

Disclosed are techniques for flash memory management, including tracking payload data via one or more data structures configured to define the size of logical pages in a flash memory. In various embodiments, the logical page size may be larger than, equal to, or smaller than a physical page size of a flash memory chip.

Flash management using logical page size

A testing apparatus is described with a housing, a power source, a carrier assembly, and a backbone connecting the carrier assembly to the power source. A resource board is disposed on the carrier assembly and is connected thereto, thereby receiving power from the power source through the carrier assembly. The resource board is adapted to perform a test on a device under test and to generate data reflecting results of the test on the device under test. A test pin assembly is disposed at one end of the resource board and is connectable with a loadboard. A controller operatively connects to the power supply, the carrier assembly, and the resource board. The controller is adapted to communicate with the resource board to execute instructions to test the device under test. The controller also receives the result data from the resource board, permitting analysis of the device under test.

Growing community of inventors

Chandler, AZ, United States of America

Rudolph J Sterbenz