Infineon Technologies Ag

Infineon Technologies Austria Ag

Rudolf Berger

Wolfgang Lehnert

Anton Mauder

Hans-Joachim Schulze

Guenther Ruhl

Roland Rupp

Raimund Foerg

Franz Hirler

Hermann Gruber

Ralf Siemieniec

Albert Birner

Michael Bernhard Sommer

Helmut Brech

Gerhard Metzger-Brueckl

Karsten Kellermann

Christian Rottmair

Helmut Strack

Klemens Pruegl

Olaf Storbeck

Stefan Pompl

Thomas Popp

John Twynam

Haifeng Sun

Frank Dieter Pfirsch

Johannes Georg Laven

Roman Baburske

Carsten Ahrens

Werner Schustereder

Ulrich Krumbein

Holger Schulze

Oliver Häberlen

Uwe Hoeckele

Stefan Sedlmaier

Bernhard Knott

Thomas Gutt

Rudolf Lehner

Stefan Willkofer

Berthold Schuderer

Juergen Wagner

Reinhard Goellner

Manfred Frank

Günther Ruhl

A method includes providing a semiconductor body, forming a thermosensitive element on or within the semiconductor body, forming a structured laser-reflective mask on the upper surface of the semiconductor body that covers the thermosensitive element and includes first and second openings, and performing a laser thermal annealing process that transmits laser energy through the first and second openings and into the semiconductor body, wherein the thermosensitive element comprises a critical temperature at which the thermosensitive element is irreparably damaged, wherein the laser thermal annealing process brings portions of the semiconductor body that are underneath the first and second openings to above the critical temperature, and wherein during the laser thermal annealing process the thermosensitive element remains below the critical temperature.

Selective laser annealing method

A semiconductor body having a base carrier portion and a type III-nitride semiconductor portion is provided. The type III-nitride semiconductor portion includes a heterojunction and two-dimensional charge carrier gas. One or more ohmic contacts are formed in the type III-nitride semiconductor portion, the ohmic contacts forming an ohmic connection with the two-dimensional charge carrier gas. A gate structure is configured to control a conductive state of the two-dimensional charge carrier gas. Forming the one or more ohmic contacts comprises forming a structured laser-reflective mask on the upper surface of the type III-nitride semiconductor portion, implanting dopant atoms into the upper surface of the type III-nitride semiconductor portion, and performing a laser thermal anneal that activates the implanted dopant atoms.

Selective thermal annealing method

A method for manufacturing a semiconductor device includes implanting gas ions in a donor wafer and bonding the donor wafer to a carrier wafer to form a compound wafer. The method also includes subjecting the compound wafer to a thermal treatment to cause separation along a delamination layer and growing an epitaxial layer on a portion of separated compound wafer to form a semiconductor device layer. The method further includes cutting the carrier wafer.

Method of manufacturing a template wafer

A wafer composite is provided which includes an auxiliary substrate, a donor substrate and a sacrificial layer formed between the auxiliary substrate and the donor substrate. Functional elements of the semiconductor component are formed in a component layer, including at least one partial layer of the donor substrate. The auxiliary substrate is then separated from the component layer by heat input into the sacrificial layer.

Wafer composite and method for producing a semiconductor component

This application relates to a method for producing a semiconductor component, in which a wafer composite is provided. The wafer composite includes a donor substrate, an auxiliary substrate and a separation layer arranged between the auxiliary substrate and the donor substrate. The separation layer has a support structure and sacrificial material, which is formed laterally between elements of the support structure. The auxiliary substrate is separated from the donor substrate. The separation includes a selective removal of the sacrificial material in relation to the support structure.

Wafer composite and method for producing semiconductor components

A semiconductor disk of a first crystalline material, which has a first lattice system, is bonded on a process surface of a base substrate, wherein a bonding layer is formed between the semiconductor disk and the base substrate. A second semiconductor layer of a second crystalline material with a second, different lattice system is formed by epitaxy on a first semiconductor layer formed from the semiconductor disk.

Method of manufacturing semiconductor devices by bonding a semiconductor disk on a base substrate, composite wafer and semiconductor device

A method for forming a semiconductor device comprises forming an amorphous or polycrystalline semiconductor layer adjacently to at least one semiconductor doping region having a first conductivity type located in a semiconductor substrate. The method further comprises incorporating dopants into the amorphous or polycrystalline semiconductor layer during or after forming the amorphous or polycrystalline semiconductor layer. The method further comprises annealing the amorphous or polycrystalline semiconductor layer to transform at least a part of the amorphous or polycrystalline semiconductor layer into a substantially monocrystalline semiconductor layer and to form at least one doping region having the second conductivity type in the monocrystalline semiconductor layer, such that a p-n junction is formed between the at least one semiconductor doping region having the first conductivity type and the at least one doping region having the second conductivity type.

Method for forming a semiconductor device

In various embodiments, an electronic component is provided. The electronic component may include a dielectric structure; and a two-dimensional material containing structure over the dielectric structure. The dielectric structure is doped with dopants to change the electric characteristic of the two-dimensional material containing structure.

Two-dimensional material containing electronic components

A composite wafer is manufactured by providing a carrier wafer including graphite and a protective layer, forming a bonding layer, and bonding the carrier wafer to a semiconductor wafer through the bonding layer.

Method for manufacturing a composite wafer having a graphite core, and composite wafer having a graphite core

A method of forming a semiconductor device includes forming an opening having a sidewall in a substrate and forming a first epitaxial layer in the opening. The first epitaxial layer is formed in a first portion of the sidewall without growing in a second portion of the sidewall. A second epitaxial layer is formed in the opening after forming the first epitaxial layer. The second epitaxial layer is formed in the second portion of the sidewall. The first epitaxial layer is removed after forming the second epitaxial layer.

Trench capacitors and methods of forming the same

A composite wafer includes a substrate and a SiC-based functional layer. The substrate includes a porous carbon substrate core and an encapsulating layer encapsulating the substrate core. The SiC-based functional layer comprises, at an interface region with the encapsulating layer, at least one of: a carbide and a silicide formed by reaction of a portion of the SiC-based functional layer with a carbide-and-silicide-forming metal. An amount of the carbide-and-silicide-forming metal, integrated over the thickness of the functional layer, is 10mg/cmto 0.1 mg/cm.

Composite wafer for bonding and encapsulating an SiC-based functional layer

A composite wafer including a carrier substrate having a graphite core and a monocrystalline semiconductor substrate or layer attached to the carrier substrate and a corresponding method for manufacturing such a composite wafer is provided.

Method for manufacturing a composite wafer having a graphite core

A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.

Method for producing a semiconductor device

According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate.

A compound structure including a carrier wafer and at least one semiconductor piece bonded onto the carrier wafer by a bonding material obtained by a ceramic-forming polymer precursor.

Growing community of inventors

Wuppertal, Germany

Rudolf Berger